Patrick Cronin

Orcid: 0000-0003-2091-4830

According to our database1, Patrick Cronin authored at least 18 papers between 2011 and 2022.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2022
Time-Print: Authenticating USB Flash Drives with Novel Timing Fingerprints.
Proceedings of the 43rd IEEE Symposium on Security and Privacy, 2022

2021
Charger-Surfing: Exploiting a Power Line Side-Channel for Smartphone Information Leakage.
Proceedings of the 30th USENIX Security Symposium, 2021

An Exploration of ARM System-Level Cache and GPU Side Channels.
Proceedings of the ACSAC '21: Annual Computer Security Applications Conference, Virtual Event, USA, December 6, 2021

2020
Securing Cyber-Physical Systems from Hardware Trojan Collusion.
IEEE Trans. Emerg. Top. Comput., 2020

A Crowd-Based Explosive Detection System with Two-Level Feedback Sensor Calibration.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

2019
Covert Data Exfiltration Using Light and Power Channels.
Proceedings of the 37th IEEE International Conference on Computer Design, 2019

A Fetching Tale: Covert Communication with the Hardware Prefetcher.
Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2019

2018
A Low Overhead Solution to Resilient Assembly Lines Built From Legacy Controllers.
IEEE Embed. Syst. Lett., 2018

Reliability and Security in Non-volatile Processors, Two Sides of the Same Coin.
Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI, 2018

Lowering the barrier to online malware detection through low frequency sampling of HPCs.
Proceedings of the 2018 IEEE International Symposium on Hardware Oriented Security and Trust, 2018

A collaborative defense against wear out attacks in non-volatile processors.
Proceedings of the 55th Annual Design Automation Conference, 2018

2017
Regularity theories disconfirmed: a revamped argument and a wager.
Synth., 2017

'The danger of sleeping', an exploration of security in non-volatile processors.
Proceedings of the 2017 Asian Hardware Oriented Security and Trust Symposium, 2017

2016
Routing path reuse maximization for efficient NV-FPGA reconfiguration.
Proceedings of the 21st Asia and South Pacific Design Automation Conference, 2016

A mutual auditing framework to protect IoT against hardware Trojans.
Proceedings of the 21st Asia and South Pacific Design Automation Conference, 2016

2015
Non-volatile memories in FPGAs: Exploiting logic similarity to accelerate reconfiguration and increase programming cycles.
Proceedings of the 2015 IFIP/IEEE International Conference on Very Large Scale Integration, 2015

Fine-tuning CLB placement to speed up reconfigurations in NVM-based FPGAs.
Proceedings of the 25th International Conference on Field Programmable Logic and Applications, 2015

2011
Facilitating the Iterative Design of Informatics Tools to Advance the Science of Autism.
Proceedings of the User Centered Networked Health Care - Proceedings of MIE 2011, 2011


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