Jingtong Hu

According to our database1, Jingtong Hu authored at least 117 papers between 2008 and 2019.

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Bibliography

2019
Checkpointing-Aware Loop Tiling for Energy Harvesting Powered Nonvolatile Processors.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2019

A Novel STT-RAM-Based Hybrid Cache for Intermittently Powered Processors in IoT Devices.
IEEE Micro, 2019

XFER: A Novel Design to Achieve Super-Linear Performance on Multiple FPGAs for Real-Time AI.
Proceedings of the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2019

Accuracy vs. Efficiency: Achieving Both through FPGA-Implementation Aware Neural Architecture Search.
Proceedings of the 56th Annual Design Automation Conference 2019, 2019

2018
Securing Emerging Nonvolatile Main Memory With Fast and Energy-Efficient AES In-Memory Implementation.
IEEE Trans. VLSI Syst., 2018

PATH: Performance-Aware Task Scheduling for Energy-Harvesting Nonvolatile Processors.
IEEE Trans. VLSI Syst., 2018

Write Energy Reduction for PCM via Pumping Efficiency Improvement.
TOS, 2018

Avoiding Data Inconsistency in Energy Harvesting Powered Embedded Systems.
ACM Trans. Design Autom. Electr. Syst., 2018

ENZYME: An Energy-Efficient Transient Computing Paradigm for Ultralow Self-Powered IoT Edge Devices.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2018

NVM-Based FPGA Block RAM With Adaptive SLC-MLC Conversion.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2018

Heterogeneous FPGA-Based Cost-Optimal Design for Timing-Constrained CNNs.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2018

Prototyping Energy Harvesting Powered Systems with Nonvolatile Processor (Invited Paper).
Proceedings of the 2018 International Symposium on Rapid System Prototyping, 2018

Low Overhead Online Checkpoint for Intermittently Powered Non-volatile FPGAs.
Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI, 2018

An area and energy efficient design of domain-wall memory-based deep convolutional neural networks using stochastic computing.
Proceedings of the 19th International Symposium on Quality Electronic Design, 2018

AIM: Fast and energy-efficient AES in-memory implementation for emerging non-volatile main memory.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

2017
CP-FPGA: Energy-Efficient Nonvolatile FPGA With Offline/Online Checkpointing Optimization.
IEEE Trans. VLSI Syst., 2017

Exploiting Multiple Write Modes of Nonvolatile Main Memory in Embedded Systems.
ACM Trans. Embedded Comput. Syst., 2017

State Asymmetry Driven State Remapping in Phase Change Memory.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2017

Stack-Size Sensitive On-Chip Memory Backup for Self-Powered Nonvolatile Processors.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2017

FlexLevel NAND Flash Storage System Design to Reduce LDPC Latency.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2017

vFlash: Virtualized Flash for Optimizing the I/O Performance in Mobile Devices.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2017

Multisource Indoor Energy Harvesting for Nonvolatile Processors.
IEEE Design & Test, 2017

Maximize energy utilization for ultra-low energy harvesting powered embedded systems.
Proceedings of the 23rd IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, 2017

Runtime and reconfiguration dual-aware placement for SRAM-NVM hybrid FPGAs.
Proceedings of the IEEE 6th Non-Volatile Memory Systems and Applications Symposium, 2017

A lightweight progress maximization scheduler for non-volatile processor under unstable energy harvesting.
Proceedings of the 18th ACM SIGPLAN/SIGBED Conference on Languages, 2017

An Efficient Racetrack Memory-Based Processing-in-Memory Architecture for Convolutional Neural Networks.
Proceedings of the 2017 IEEE International Symposium on Parallel and Distributed Processing with Applications and 2017 IEEE International Conference on Ubiquitous Computing and Communications (ISPA/IUCC), 2017

Design Exploration for Multiple Level Cell Based Non-Volatile FPGAs.
Proceedings of the 2017 IEEE International Conference on Computer Design, 2017

CNN-based pattern recognition on nonvolatile IoT platform for smart ultraviolet monitoring: (Invited paper).
Proceedings of the 2017 IEEE/ACM International Conference on Computer-Aided Design, 2017

Age-aware Logic and Memory Co-Placement for RRAM-FPGAs.
Proceedings of the 54th Annual Design Automation Conference, 2017

2016
Data Allocation with Minimum Cost under Guaranteed Probability for Multiple Types of Memories.
Signal Processing Systems, 2016

Wear-Leveling Aware Page Management for Non-Volatile Main Memory on Embedded Systems.
IEEE Trans. Multi-Scale Computing Systems, 2016

Image-Content-Aware I/O Optimization for Mobile Virtualization.
ACM Trans. Embedded Comput. Syst., 2016

A Time, Energy, and Area Efficient Domain Wall Memory-Based SPM for Embedded Systems.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2016

Write Mode Aware Loop Tiling for High Performance Low Power Volatile PCM in Embedded Systems.
IEEE Trans. Computers, 2016

Redesigning software and systems for non-volatile processors on self-powered devices.
Proceedings of the 2016 IFIP/IEEE International Conference on Very Large Scale Integration, 2016

Multi-source in-door energy harvesting for non-volatile processors.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

Dynamic converter reconfiguration for near-threshold non-volatile processors using in-door energy harvesting.
Proceedings of the 34th IEEE International Conference on Computer Design, 2016

Neural Network-based Prediction Algorithms for In-Door Multi-Source Energy Harvesting System for Non-Volatile Processors.
Proceedings of the 26th edition on Great Lakes Symposium on VLSI, 2016

TEMP: thread batch enabled memory partitioning for GPU.
Proceedings of the 53rd Annual Design Automation Conference, 2016

Two-step state transition minimization for lifetime and performance improvement on MLC STT-RAM.
Proceedings of the 53rd Annual Design Automation Conference, 2016

Performance-aware task scheduling for energy harvesting nonvolatile processors considering power switching overhead.
Proceedings of the 53rd Annual Design Automation Conference, 2016

Checkpoint aware hybrid cache architecture for NV processor in energy harvesting powered systems.
Proceedings of the Eleventh IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2016

Routing path reuse maximization for efficient NV-FPGA reconfiguration.
Proceedings of the 21st Asia and South Pacific Design Automation Conference, 2016

Peak-to-average pumping efficiency improvement for charge pump in Phase Change Memories.
Proceedings of the 21st Asia and South Pacific Design Automation Conference, 2016

2015
Reliability-Guaranteed Task Assignment and Scheduling for Heterogeneous Multiprocessors Considering Timing Constraint.
Signal Processing Systems, 2015

Low Overhead Software Wear Leveling for Hybrid PCM + DRAM Main Memory on Embedded Systems.
IEEE Trans. VLSI Syst., 2015

Optimizing Task and Data Assignment on Multi-Core Systems with Multi-Port SPMs.
IEEE Trans. Parallel Distrib. Syst., 2015

Non-volatile memories in FPGAs: Exploiting logic similarity to accelerate reconfiguration and increase programming cycles.
Proceedings of the 2015 IFIP/IEEE International Conference on Very Large Scale Integration, 2015

Virtual Machine Image Content Aware I/O Optimization for Mobile Virtualization.
Proceedings of the 17th IEEE International Conference on High Performance Computing and Communications, 2015

Multi-source energy harvesting management and optimization for non-volatile processors.
Proceedings of the Sixth International Green and Sustainable Computing Conference, 2015

Fine-tuning CLB placement to speed up reconfigurations in NVM-based FPGAs.
Proceedings of the 25th International Conference on Field Programmable Logic and Applications, 2015

Nonvolatile main memory aware garbage collection in high-level language virtual machine.
Proceedings of the 2015 International Conference on Embedded Software, 2015

Software assisted non-volatile register reduction for energy harvesting based cyber-physical system.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

Fixing the broken time machine: consistency-aware checkpointing for energy harvesting powered non-volatile processor.
Proceedings of the 52nd Annual Design Automation Conference, 2015

VWS: a versatile warp scheduler for exploring diverse cache localities of GPGPU applications.
Proceedings of the 52nd Annual Design Automation Conference, 2015

Compiler directed automatic stack trimming for efficient non-volatile processors.
Proceedings of the 52nd Annual Design Automation Conference, 2015

FlexLevel: a novel NAND flash storage system design for LDPC latency reduction.
Proceedings of the 52nd Annual Design Automation Conference, 2015

Area and performance co-optimization for domain wall memory in application-specific embedded systems.
Proceedings of the 52nd Annual Design Automation Conference, 2015

Checkpoint-aware instruction scheduling for nonvolatile processor with multiple functional units.
Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015

Improving performance and lifetime of DRAM-PCM hybrid main memory through a proactive page allocation strategy.
Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015

Unified non-volatile memory and NAND flash memory architecture in smartphones.
Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015

2014
Minimizing System Cost with Efficient Task Assignment on Heterogeneous Multicore Processors Considering Time Constraint.
IEEE Trans. Parallel Distrib. Syst., 2014

Management and optimization for nonvolatile memory-based hybrid scratchpad memory on multicore embedded processors.
ACM Trans. Embedded Comput. Syst., 2014

Scheduling to Optimize Cache Utilization for Non-Volatile Main Memories.
IEEE Trans. Computers, 2014

A space allocation and reuse strategy for PCM-based embedded systems.
Journal of Systems Architecture - Embedded Systems Design, 2014

A genetic algorithm for task scheduling on heterogeneous computing systems using multiple priority queues.
Inf. Sci., 2014

Efficient grouping-based mapping and scheduling on heterogeneous cluster architectures.
Computers & Electrical Engineering, 2014

Stream Bench: Towards Benchmarking Modern Distributed Stream Computing Frameworks.
Proceedings of the 7th IEEE/ACM International Conference on Utility and Cloud Computing, 2014

Non-volatile registers aware instruction selection for embedded systems.
Proceedings of the 2014 IEEE 20th International Conference on Embedded and Real-Time Computing Systems and Applications, 2014

Wear-leveling for PCM main memory on embedded system via page management and process scheduling.
Proceedings of the 2014 IEEE 20th International Conference on Embedded and Real-Time Computing Systems and Applications, 2014

Minimum-cost data allocation with guaranteed probability on multiple types of memory.
Proceedings of the 2014 IEEE 20th International Conference on Embedded and Real-Time Computing Systems and Applications, 2014

Virtual-machine metadata optimization for I/O traffic reduction in mobile virtualization.
Proceedings of the IEEE Non-Volatile Memory Systems and Applications Symposium, 2014

Online Data Allocation for Hybrid Memories on Embedded Tele-health Systems.
Proceedings of the 2014 IEEE International Conference on High Performance Computing and Communications, 2014

3M-PCM: Exploiting multiple write modes MLC phase change main memory in embedded systems.
Proceedings of the 2014 International Conference on Hardware/Software Codesign and System Synthesis, 2014

2013
Algorithms to Minimize Data Transfer for Code Update on Wireless Sensor Network.
Signal Processing Systems, 2013

Efficient Loop Scheduling for Chip Multiprocessors with Non-Volatile Main Memory.
Signal Processing Systems, 2013

Data Allocation Optimization for Hybrid Scratch Pad Memory With SRAM and Nonvolatile Memory.
IEEE Trans. VLSI Syst., 2013

Write activity reduction on non-volatile main memories for embedded chip multiprocessors.
ACM Trans. Embedded Comput. Syst., 2013

Data Placement and Duplication for Embedded Multicore Systems With Scratch Pad Memory.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2013

Energy-aware preemptive scheduling algorithm for sporadic tasks on DVS platform.
Microprocessors and Microsystems - Embedded Hardware Design, 2013

Minimizing accumulative memory load cost on multi-core DSPs with multi-level memory.
Journal of Systems Architecture - Embedded Systems Design, 2013

Optimal data allocation algorithm for loop-centric applications on scratch-PAD memories.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2013

Optimizing task assignment for heterogeneous multiprocessor system with guaranteed reliability and timing constraint.
Proceedings of the 2013 IEEE 19th International Conference on Embedded and Real-Time Computing Systems and Applications, 2013

A space-based wear leveling for PCM-based embedded systems.
Proceedings of the 2013 IEEE 19th International Conference on Embedded and Real-Time Computing Systems and Applications, 2013

Efficient task assignment and scheduling for MPSoC DSPS with VS-SPM considering concurrent accesses through data allocation.
Proceedings of the IEEE International Conference on Acoustics, 2013

Software enabled wear-leveling for hybrid PCM main memory on embedded systems.
Proceedings of the Design, Automation and Test in Europe, 2013

2012
Minimizing Access Cost for Multiple Types of Memory Units in Embedded Systems Through Data Allocation and Scheduling.
IEEE Trans. Signal Processing, 2012

Randomized execution algorithms for smart cards to resist power analysis attacks.
Journal of Systems Architecture - Embedded Systems Design, 2012

Memory access schedule minimization for embedded systems.
Journal of Systems Architecture - Embedded Systems Design, 2012

Optimal Assignment for Tree-Structure Task Graph on Heterogeneous Multicore Systems Considering Time Constraint.
Proceedings of the IEEE 6th International Symposium on Embedded Multicore/Manycore SoCs, 2012

Optimizing Data Allocation and Memory Configuration for Non-Volatile Memory Based Hybrid SPM on Embedded CMPs.
Proceedings of the 26th IEEE International Parallel and Distributed Processing Symposium Workshops & PhD Forum, 2012

CAR: Securing PCM Main Memory System with Cache Address Remapping.
Proceedings of the 18th IEEE International Conference on Parallel and Distributed Systems, 2012

Loop scheduling optimization for chip-multiprocessors with non-volatile main memory.
Proceedings of the 2012 IEEE International Conference on Acoustics, 2012

Efficient Task Assignment on Heterogeneous Multicore Systems Considering Communication Overhead.
Proceedings of the Algorithms and Architectures for Parallel Processing, 2012

PRR: A low-overhead cache replacement algorithm for embedded processors.
Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012

MGC: Multiple graph-coloring for non-volatile memory based hybrid Scratchpad Memory.
Proceedings of the 16th Workshop on Interaction between Compilers and Computer Architectures, 2012

2011
Write Activity Minimization for Nonvolatile Main Memory Via Scheduling and Recomputation.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2011

Optimal Data Placement for Memory Architectures with Scratch-Pad Memories.
Proceedings of the IEEE 10th International Conference on Trust, 2011

Optimal Data Allocation for Scratch-Pad Memory on Embedded Multi-core Systems.
Proceedings of the International Conference on Parallel Processing, 2011

Towards energy efficient hybrid on-chip Scratch Pad Memory with non-volatile memory.
Proceedings of the Design, Automation and Test in Europe, 2011

2010
Iterational retiming with partitioning: Loop scheduling with complete memory latency hiding.
ACM Trans. Embedded Comput. Syst., 2010

Algorithms for Optimally Arranging Multicore Memory Structures.
EURASIP J. Emb. Sys., 2010

Optimal scheduling to minimize non-volatile memory access time with hardware cache.
Proceedings of the 18th IEEE/IFIP VLSI-SoC 2010, 2010

Minimizing write activities to non-volatile memory via scheduling and recomputation.
Proceedings of the IEEE 8th Symposium on Application Specific Processors, 2010

Write activity reduction on flash main memory via smart victim cache.
Proceedings of the 20th ACM Great Lakes Symposium on VLSI 2009, 2010

Reducing write activities on non-volatile memories in embedded CMPs via data migration and recomputation.
Proceedings of the 47th Design Automation Conference, 2010

Impacts of Inaccurate Information on Resource Allocation for Multi-Core Embedded Systems.
Proceedings of the 10th IEEE International Conference on Computer and Information Technology, 2010

2009
Optimizing scheduling and intercluster connection for application-specific DSP processors.
IEEE Trans. Signal Processing, 2009

Reprogramming with Minimal Transferred Data on Wireless Sensor Network.
Proceedings of the IEEE 6th International Conference on Mobile Adhoc and Sensor Systems, 2009

Energy Minimization and Latency Hiding for Heterogeneous Parallel Memory.
Proceedings of the 15th IEEE International Conference on Parallel and Distributed Systems, 2009

Minimizing Memory Access Schedule for Memories.
Proceedings of the 15th IEEE International Conference on Parallel and Distributed Systems, 2009

2008
Timing optimization via nest-loop pipelining considering code size.
Microprocessors and Microsystems - Embedded Hardware Design, 2008

Minimizing Transferred Data for Code Update on Wireless Sensor Network.
Proceedings of the Wireless Algorithms, 2008

Address assignment sensitive variable partitioning and scheduling for DSPS with multiple memory banks.
Proceedings of the IEEE International Conference on Acoustics, 2008

Loop scheduling and assignment to minimize energy while hiding latency for heterogeneous multi-bank memory.
Proceedings of the FPL 2008, 2008

Dynamic and Leakage Power Minimization with Loop Voltage Scheduling and Assignment.
Proceedings of the 2008 IEEE/IPIP International Conference on Embedded and Ubiquitous Computing (EUC 2008), 2008

QoS for Networked Heterogeneous Real-Time Embedded Systems.
Proceedings of the ISCA 21st International Conference on Parallel and Distributed Computing and Communication Systems, 2008


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