Paul M. Belemjian

According to our database1, Paul M. Belemjian authored at least 7 papers between 2003 and 2011.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2011
Carry Chains for Ultra High-Speed SiGe HBT Adders.
IEEE Trans. Circuits Syst. I Regul. Pap., 2011

2009
Mitigating Memory Wall Effects in High-Clock-Rate and Multicore CMOS 3-D Processor Memory Stacks.
Proc. IEEE, 2009

Thermal analysis for a SiGe HBT 40 watt 32 GHz clock 3D memory processor chip stack using diamond heat spreader layers.
Proceedings of the IEEE International Conference on 3D System Integration, 2009

2007
Amdahl's figure of merit, SiGe HBT BiCMOS, and 3D chip stacking.
Proceedings of the 25th International Conference on Computer Design, 2007

2005
SiGe HBT Microprocessor Core Test Vehicle.
Proc. IEEE, 2005

Predicting the Performance of a 3D Processor-Memory Chip Stack.
IEEE Des. Test Comput., 2005

2003
3D direct vertical interconnect microprocessors test vehicle.
Proceedings of the 13th ACM Great Lakes Symposium on VLSI 2003, 2003


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