Kerry Bernstein

According to our database1, Kerry Bernstein authored at least 20 papers between 1995 and 2018.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Awards

IEEE Fellow

IEEE Fellow 2007, "For contributions to high performance common metal oxide semiconductor circuit design".

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2018
Murphy was an optimist: Embracing asymmetry in electronics.
Proceedings of the 19th International Symposium on Quality Electronic Design, 2018

2016
F1: Designing secure systems: Manufacturing, circuits and architectures.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

2010
Device and Architecture Outlook for Beyond CMOS Switches.
Proc. IEEE, 2010

Silicon 3D-integration technology and systems.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010

2009
Mitigating Memory Wall Effects in High-Clock-Rate and Multicore CMOS 3-D Processor Memory Stacks.
Proc. IEEE, 2009

2008
Thermomechanical modeling of 3D electronic packages.
IBM J. Res. Dev., 2008

2007
Interconnects in the Third Dimension: Design Challenges for 3D ICs.
Proceedings of the 44th Design Automation Conference, 2007

2006
Design space exploration for 3D architectures.
ACM J. Emerg. Technol. Comput. Syst., 2006

Three-dimensional integrated circuits.
IBM J. Res. Dev., 2006

Ultralow-voltage, minimum-energy CMOS.
IBM J. Res. Dev., 2006

High-performance CMOS variability in the 65-nm regime and beyond.
IBM J. Res. Dev., 2006

Dependability Analysis of Nano-scale FinFET circuits.
Proceedings of the 2006 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2006), 2006

2004
Nanometer-Scale CMOS Devices.
Proceedings of the 5th International Symposium on Quality of Electronic Design (ISQED 2004), 2004

2003
Microarchitecture on the MOSFET Diet.
Proceedings of the 36th Annual International Symposium on Microarchitecture, 2003

Design and CAD Challenges in sub-90nm CMOS Technologies.
Proceedings of the 2003 International Conference on Computer-Aided Design, 2003

Reshaping EDA for power.
Proceedings of the 40th Design Automation Conference, 2003

Three dimensional CMOS devices and integrated circuits.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2003

2002
Analysis of the effect of the gate oxide breakdown on SRAM stability.
Microelectron. Reliab., 2002

1996
Practical performance/power alternatives within an existing CMOS technology generation.
Proceedings of the 1996 International Symposium on Low Power Electronics and Design, 1996

1995
Reduced-voltage power/performance optimization of the 3.6-volt PowerPC 601 Microprocessor.
IBM J. Res. Dev., 1995


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