Pedro Tauã Lopes Pereira
Orcid: 0000-0001-5231-3963Affiliations:
- Federal University of Rio Grande do Sul (UFRGS), Graduate Program on Microelectronics (PGMicro), Brazil
According to our database1,
Pedro Tauã Lopes Pereira
authored at least 17 papers
between 2019 and 2025.
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Bibliography
2025
Cross-Layer Approximate Design of Low-Power Fractional Motion Estimation Accelerators for VVC.
IEEE Trans. Very Large Scale Integr. Syst., September, 2025
ReAdapt-II: Energy-Quality Optimizations for VLSI Adaptive Filters Through Automatic Reconfiguration and Built-In Iterative Dividers.
IEEE Trans. Very Large Scale Integr. Syst., February, 2025
Approximate Adders for Efficient Circuits: Advantages and Limitations Compared to RCA.
Proceedings of the 38th SBC/SBMicro/IEEE Symposium on Integrated Circuits and Systems Design, 2025
Quality-Reconfigurable Approximate Multiplier Utilizing Select Leading One-Bit Blocks.
Proceedings of the 16th IEEE Latin America Symposium on Circuits and Systems, 2025
Proceedings of the IEEE International Symposium on Circuits and Systems, 2025
2023
ReAdapt: A Reconfigurable Datapath for Runtime Energy-Quality Scalable Adaptive Filters.
IEEE Trans. Circuits Syst. I Regul. Pap., January, 2023
Architectural Exploration for Energy-Efficient LMS and NLMS Adaptive Filters VLSI Design.
Proceedings of the 21st IEEE Interregional NEWCAS Conference, 2023
Proceedings of the 53rd Annual IEEE/IFIP International Conference on Dependable Systems and Networks, 2023
2022
Energy-Quality Scalable Design Space Exploration of Approximate FFT Hardware Architectures.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022
Improved Approximate Multipliers for Single-Precision Floating-Point Hardware Design.
Proceedings of the 13th IEEE Latin America Symposium on Circuits and System, 2022
Exploring Approximate Arithmetic Units for a Power-Efficient Kalman Gain VLSI Design.
Proceedings of the 29th IEEE International Conference on Electronics, Circuits and Systems, 2022
2021
Architectural Exploration for Energy-Efficient Fixed-Point Kalman Filter VLSI Design.
IEEE Trans. Very Large Scale Integr. Syst., 2021
Exploring NLMS-Based Adaptive Filter Hardware Architectures for Eliminating Power Line Interference in EEG Signals.
Circuits Syst. Signal Process., 2021
Exploring Approximate Adders for Power-Efficient Harmonics Elimination Hardware Architectures.
Proceedings of the 12th IEEE Latin America Symposium on Circuits and System, 2021
Proceedings of the 12th IEEE Latin America Symposium on Circuits and System, 2021
Boosting the Efficiency of the Harmonics Elimination VLSI Architecture by Arithmetic Approximations.
Proceedings of the 28th IEEE International Conference on Electronics, 2021
2019
Exploring Architectural Solutions for an Energy-Efficient Kalman Filter Gain Realization.
Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019