Peter Lisherness

According to our database, Peter Lisherness authored at least 14 papers between 2008 and 2013.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2013

Mutation analysis with coverage discounting.

Peter Lisherness, Nicole Lesperance, Kwang-Ting (Tim) Cheng

Proceedings of the Design, Automation and Test in Europe, 2013

2012

Power-Efficient Calibration and Reconfiguration for Optical Network-on-Chip.

Yan Zheng, Peter Lisherness, Ming Gao, Jock Bovington, Kwang-Ting Cheng, Hong Wang, Shiyuan Yang

JOCN, 2012

Adaptive test selection for post-silicon timing validation: A data mining approach.

Ming Gao, Peter Lisherness, Kwang-Ting (Tim) Cheng

Proceedings of the 2012 IEEE International Test Conference, 2012

Power-efficient calibration and reconfiguration for on-chip optical communication.

Yan Zheng, Peter Lisherness, Ming Gao, Jock Bovington, Shiyuan Yang, Kwang-Ting Cheng

Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

Post-fabrication reconfiguration for power-optimized tuning of optically connected multi-core systems.

Yan Zheng, Peter Lisherness, Saeed Shamshiri, Amirali Ghofrani, Shiyuan Yang, Kwang-Ting Cheng

Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012

Improving validation coverage metrics to account for limited observability.

Peter Lisherness, Kwang-Ting Cheng

Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012

On error modeling of electrical bugs for post-silicon timing validation.

Ming Gao, Peter Lisherness, Kwang-Ting Cheng, Jing-Jia Liou

Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012

2011

Time-Multiplexed Online Checking.

Ming Gao, Hsiu-Ming Chang, Peter Lisherness, Kwang-Ting (Tim) Cheng

IEEE Trans. Computers, 2011

Coverage discounting: A generalized approach for testbench qualification.

Peter Lisherness, Kwang-Ting (Tim) Cheng

Proceedings of the 2011 IEEE International High Level Design Validation and Test Workshop, 2011

Post-silicon bug detection for variation induced electrical bugs.

Ming Gao, Peter Lisherness, Kwang-Ting (Tim) Cheng

Proceedings of the 16th Asia South Pacific Design Automation Conference, 2011

2010

SCEMIT: a systemc error and mutation injection tool.

Peter Lisherness, Kwang-Ting (Tim) Cheng

Proceedings of the 47th Design Automation Conference, 2010

2009

An instrumented observability coverage method for system validation.

Peter Lisherness, Kwang-Ting Cheng

Proceedings of the IEEE International High Level Design Validation and Test Workshop, 2009

2008

A Cost Analysis Framework for Multi-core Systems with Spares.

Saeed Shamshiri, Peter Lisherness, Sung-Jui (Song-Ra) Pan, Kwang-Ting Cheng

Proceedings of the 2008 IEEE International Test Conference, 2008

Time-Multiplexed Online Checking: A Feasibility Study.

Ming Gao, Hsiu-Ming (Sherman) Chang, Peter Lisherness, Kwang-Ting (Tim) Cheng

Proceedings of the 17th IEEE Asian Test Symposium, 2008