Peter Yiannacouras

According to our database, Peter Yiannacouras authored at least 16 papers between 2003 and 2017.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2017

Host Pipes: Direct Streaming Interface Between OpenCL Host and Kernel.

K. Kang, Peter Yiannacouras

Proceedings of the 5th International Workshop on OpenCL, 2017

2016

OpenCL.

Deshanand P. Singh, Peter Yiannacouras

Proceedings of the FPGAs for Software Programmers, 2016

2012

Portable, Flexible, and Scalable Soft Vector Processors.

Peter Yiannacouras, J. Gregory Steffan, Jonathan Rose

IEEE Trans. Very Large Scale Integr. Syst., 2012

From opencl to high-performance hardware on FPGAS.

Tomasz S. Czajkowski, Utku Aydonat, Dmitry Denisenko, John Freeman, Michael Kinsner, David Neto, Jason Wong, Peter Yiannacouras, Deshanand P. Singh

Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL), 2012

2009

Data parallel FPGA workloads: Software versus hardware.

Peter Yiannacouras, J. Gregory Steffan, Jonathan Rose

Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009

Soft vector processors vs FPGA custom hardware: measuring and reducing the gap.

Peter Yiannacouras, J. Gregory Steffan, Jonathan Rose

Proceedings of the ACM/SIGDA 17th International Symposium on Field Programmable Gate Arrays, 2009

Fine-grain performance scaling of soft vector processors.

Peter Yiannacouras, J. Gregory Steffan, Jonathan Rose

Proceedings of the 2009 International Conference on Compilers, 2009

2008

A Desktop Computer with a Reconfigurable Pentium®.

Shih-Lien Lu, Peter Yiannacouras, Taeweon Suh, Rolf Kassa, Michael Konow

ACM Trans. Reconfigurable Technol. Syst., 2008

Scaling Soft Processor Systems.

Martin Labrecque, Peter Yiannacouras, J. Gregory Steffan

Proceedings of the 16th IEEE International Symposium on Field-Programmable Custom Computing Machines, 2008

VESPA: portable, scalable, and flexible FPGA-based vector processors.

Peter Yiannacouras, J. Gregory Steffan, Jonathan Rose

Proceedings of the 2008 International Conference on Compilers, 2008

2007

Exploration and Customization of FPGA-Based Soft Processors.

Peter Yiannacouras, J. Gregory Steffan, Jonathan Rose

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007

Custom code generation for soft processors.

Martin Labrecque, Peter Yiannacouras, J. Gregory Steffan

SIGARCH Comput. Archit. News, 2007

An FPGA-based Pentium in a complete desktop system.

Shih-Lien Lu, Peter Yiannacouras, Rolf Kassa, Michael Konow, Taeweon Suh

Proceedings of the ACM/SIGDA 15th International Symposium on Field Programmable Gate Arrays, 2007

2006

Application-specific customization of soft processor microarchitecture.

Peter Yiannacouras, J. Gregory Steffan, Jonathan Rose

Proceedings of the ACM/SIGDA 14th International Symposium on Field Programmable Gate Arrays, 2006

2005

The microarchitecture of FPGA-based soft processors.

Peter Yiannacouras, Jonathan Rose, J. Gregory Steffan

Proceedings of the 2005 International Conference on Compilers, 2005

2003

A parameterized automatic cache generator for FPGAs.

Peter Yiannacouras, Jonathan Rose

Proceedings of the 2003 IEEE International Conference on Field-Programmable Technology, 2003