Petru Bogdan Bacinschi

According to our database, Petru Bogdan Bacinschi authored at least 7 papers between 2006 and 2009.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2009

A Multistep Extrapolated S-Parameter Model for Arbitrary On-Chip Interconnect Structures.

Petru Bogdan Bacinschi, Manfred Glesner

Proceedings of the VLSI-SoC: Technologies for Systems Integration, 2009

2008

Comparison of Opamp-Based and Comparator-Based Delta-Sigma Modulation.

Massoud Momeni, Petru Bogdan Bacinschi, Manfred Glesner

Proceedings of the Design, Automation and Test in Europe, 2008

An Analog On-Chip Adaptive Body Bias Calibration for Reducing Mismatches in Transistor Pairs.

Petru Bogdan Bacinschi, Tudor Murgan, Klaus Koch, Manfred Glesner

Proceedings of the Design, Automation and Test in Europe, 2008

2007

Low-Complexity Adaptive Encoding Schemes Based on Partial Bus-Invert for Power Reduction in Buses Exhibiting Capacitive Coupling.

Tudor Murgan, Andre Guntoro, Heiko Hinkelmann, Petru Bogdan Bacinschi, Manfred Glesner

Proceedings of the 3rd International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2007

On the Necessity of Combining Coding with Spacing and Shielding for Improving Performance and Power in Very Deep Sub-micron Interconnects.

Tudor Murgan, Petru Bogdan Bacinschi, Sujan Pandey, Alberto García Ortiz, Manfred Glesner

Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2007

2006

Simultaneous Placement and Buffer Planning for Reduction of Power Consumption in Interconnects and Repeaters.

Tudor Murgan, Oliver Mitea, Sujan Pandey, Petru Bogdan Bacinschi, Manfred Glesner

Proceedings of the IFIP VLSI-SoC 2006, 2006

Partial Bus-Invert Bus Encoding Schemes for Low-Power DSP Systems Considering Inter-wire Capacitance.

Tudor Murgan, Petru Bogdan Bacinschi, Alberto García Ortiz, Manfred Glesner

Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2006