Qiumeng Wei

Orcid: 0009-0005-0550-4835

According to our database1, Qiumeng Wei authored at least 4 papers between 2024 and 2025.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

On csauthors.net:

Bibliography

2025
A RRAM-Based CIM Design With in-Situ Transposable Computing and Hybrid-Precision Scheme for Edge Learning.
IEEE Solid State Circuits Lett., 2025

2024
A Reconfigurable Computing-in-Memory Accelerator With Dynamic Group-Based Dataflow and Dual-Input Macro Designs.
IEEE Trans. Circuits Syst. II Express Briefs, December, 2024

A 3.75Mb Embedded RRAM IP on 40nm High-Voltage CMOS Technology.
Proceedings of the IEEE International Memory Workshop, 2024

ANVMP: A 28nm 52.6 μW 1.25pJ/SOP Asynchronous Non- Volatile-Memory-based Computing-In-Memory Neuromorphic Processor for Edge-Al Applications.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2024


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