Rachel Selina Rajarathnam

According to our database, Rachel Selina Rajarathnam authored at least 4 papers between 2020 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2023

DREAMPlaceFPGA-MP: An Open-Source GPU-Accelerated Macro Placer for Modern FPGAs with Cascade Shapes and Region Constraints.

Zhili Xiong, Rachel Selina Rajarathnam, Zhixing Jiang, Hanqing Zhu, David Z. Pan

CoRR, 2023

DREAMPlaceFPGA-PL: An Open-Source GPU-Accelerated Packer-Legalizer for Heterogeneous FPGAs.

Rachel Selina Rajarathnam, Zixuan Jiang, Mahesh A. Iyer, David Z. Pan

Proceedings of the 2023 International Symposium on Physical Design, 2023

2022

DREAMPlaceFPGA: An Open-Source Analytical Placer for Large Scale Heterogeneous FPGAs using Deep-Learning Toolkit.

Rachel Selina Rajarathnam, Mohamed Baker Alawieh, Zixuan Jiang, Mahesh A. Iyer, David Z. Pan

Proceedings of the 27th Asia and South Pacific Design Automation Conference, 2022

2020

ReGDS: A Reverse Engineering Framework from GDSII to Gate-level Netlist.

Rachel Selina Rajarathnam, Yibo Lin, Yier Jin, David Z. Pan

Proceedings of the 2020 IEEE International Symposium on Hardware Oriented Security and Trust, 2020