Farinaz Koushanfar

According to our database1, Farinaz Koushanfar authored at least 201 papers between 2000 and 2019.

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Bibliography

2019
Safe Machine Learning and Defeating Adversarial Attacks.
IEEE Security & Privacy, 2019

XONN: XNOR-based Oblivious Deep Neural Network Inference.
IACR Cryptology ePrint Archive, 2019

MPCircuits: Optimized Circuit Generation for Secure Multi-Party Computation.
IACR Cryptology ePrint Archive, 2019

A Neural-based Program Decompiler.
CoRR, 2019

Decentralized Bayesian Learning over Graphs.
CoRR, 2019

Universal Adversarial Perturbations for Speech Recognition Systems.
CoRR, 2019

SWNet: Small-World Neural Networks and Rapid Convergence.
CoRR, 2019

BlackMarks: Blackbox Multibit Watermarking for Deep Neural Networks.
CoRR, 2019

XONN: XNOR-based Oblivious Deep Neural Network Inference.
CoRR, 2019

ARM2GC: Succinct Garbled Processor for Secure Computation.
CoRR, 2019

Peer-to-peer Federated Learning on Graphs.
CoRR, 2019

CodeX: Bit-Flexible Encoding for Streaming-based FPGA Acceleration of DNNs.
CoRR, 2019

XONN: XNOR-based Oblivious Deep Neural Network Inference.
Proceedings of the 28th USENIX Security Symposium, 2019

DeepMarks: A Secure Fingerprinting Framework for Digital Rights Management of Deep Learning Models.
Proceedings of the 2019 on International Conference on Multimedia Retrieval, 2019

DeepAttest: an end-to-end attestation framework for deep neural networks.
Proceedings of the 46th International Symposium on Computer Architecture, 2019

DeepInspect: A Black-box Trojan Detection and Mitigation Framework for Deep Neural Networks.
Proceedings of the Twenty-Eighth International Joint Conference on Artificial Intelligence, 2019

MPCircuits: Optimized Circuit Generation for Secure Multi-Party Computation.
Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2019

SparseHD: Algorithm-Hardware Co-optimization for Efficient High-Dimensional Computing.
Proceedings of the 27th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2019

FASE: FPGA Acceleration of Secure Function Evaluation.
Proceedings of the 27th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2019

SimBNN: A Similarity-Aware Binarized Neural Network Acceleration Framework.
Proceedings of the 27th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2019

ARM2GC: Succinct Garbled Processor for Secure Computation.
Proceedings of the 56th Annual Design Automation Conference 2019, 2019

DeepSigns: An End-to-End Watermarking Framework for Ownership Protection of Deep Neural Networks.
Proceedings of the Twenty-Fourth International Conference on Architectural Support for Programming Languages and Operating Systems, 2019

A Framework for Collaborative Learning in Secure High-Dimensional Space.
Proceedings of the 12th IEEE International Conference on Cloud Computing, 2019

2018
ReDCrypt: Real-Time Privacy-Preserving Deep Learning Inference in Clouds Using FPGAs.
TRETS, 2018

Editorial for TODAES Special Issue on Internet of Things System Performance, Reliability, and Security.
ACM Trans. Design Autom. Electr. Syst., 2018

SHAIP: Secure Hamming Distance for Authentication of Intrinsic PUFs.
ACM Trans. Design Autom. Electr. Syst., 2018

P3: Privacy Preserving Positioning for Smart Automotive Systems.
ACM Trans. Design Autom. Electr. Syst., 2018

RankMap: A Framework for Distributed Learning From Dense Data Sets.
IEEE Trans. Neural Netw. Learning Syst., 2018

DeepSigns: A Generic Watermarking Framework for IP Protection of Deep Learning Models.
IACR Cryptology ePrint Archive, 2018

Pushing the Communication Barrier in Secure Computation using Lookup Tables.
IACR Cryptology ePrint Archive, 2018

DeepMarks: A Digital Fingerprinting Framework for Deep Neural Networks.
IACR Cryptology ePrint Archive, 2018

Performance Comparison of Contemporary DNN Watermarking Techniques.
CoRR, 2018

Adversarial Reprogramming of Sequence Classification Neural Networks.
CoRR, 2018

RAPIDNN: In-Memory Deep Neural Network Acceleration Framework.
CoRR, 2018

AgileNet: Lightweight Dictionary-based Few-shot Learning.
CoRR, 2018

DeepMarks: A Digital Fingerprinting Framework for Deep Neural Networks.
CoRR, 2018

DeepSigns: A Generic Watermarking Framework for IP Protection of Deep Learning Models.
CoRR, 2018

Chameleon: A Hybrid Secure Computation Framework for Machine Learning Applications.
CoRR, 2018

DeepFense: online accelerated defense against adversarial deep learning.
Proceedings of the International Conference on Computer-Aided Design, 2018

Assured deep learning: practical defense against adversarial attacks.
Proceedings of the International Conference on Computer-Aided Design, 2018

Privacy-preserving deep learning and inference.
Proceedings of the International Conference on Computer-Aided Design, 2018

CausaLearn: Automated Framework for Scalable Streaming-based Causal Bayesian Learning using FPGAs.
Proceedings of the 2018 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2018

ReBNet: Residual Binarized Neural Network.
Proceedings of the 26th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2018

Deepsecure: scalable provably-secure deep learning.
Proceedings of the 55th Annual Design Automation Conference, 2018

MAXelerator: FPGA accelerator for privacy preserving multiply-accumulate (MAC) on cloud servers.
Proceedings of the 55th Annual Design Automation Conference, 2018

Chameleon: A Hybrid Secure Computation Framework for Machine Learning Applications.
Proceedings of the 2018 on Asia Conference on Computer and Communications Security, 2018

2017
RISE: An Automated Framework for Real-Time Intelligent Video Surveillance on FPGA.
ACM Trans. Embedded Comput. Syst., 2017

CAMsure: Secure Content-Addressable Memory for Approximate Search.
ACM Trans. Embedded Comput. Syst., 2017

Toward Practical Secure Stable Matching.
PoPETs, 2017

ARM2GC: Simple and Efficient Garbled Circuit Framework by Skipping.
IACR Cryptology ePrint Archive, 2017

DeepSecure: Scalable Provably-Secure Deep Learning.
IACR Cryptology ePrint Archive, 2017

Chameleon: A Hybrid Secure Computation Framework for Machine Learning Applications.
IACR Cryptology ePrint Archive, 2017

ResBinNet: Residual Binary Neural Network.
CoRR, 2017

CuRTAIL: ChaRacterizing and Thwarting AdversarIal deep Learning.
CoRR, 2017

DeepSecure: Scalable Provably-Secure Deep Learning.
CoRR, 2017

Pushing the Communication Barrier in Secure Computation using Lookup Tables.
Proceedings of the 24th Annual Network and Distributed System Security Symposium, 2017

TinyDL: Just-in-time deep learning solution for constrained embedded systems.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

20 Years of research on intellectual property protection.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

ExtDict: Extensible Dictionaries for Data- and Platform-Aware Large-Scale Learning.
Proceedings of the 2017 IEEE International Parallel and Distributed Processing Symposium Workshops, 2017

BioChipWork: Reverse Engineering of Microfluidic Biochips.
Proceedings of the 2017 IEEE International Conference on Computer Design, 2017

Customizing Neural Networks for Efficient FPGA Implementation.
Proceedings of the 25th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2017

LookNN: Neural network with no multiplication.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

Deep3: Leveraging Three Levels of Parallelism for Efficient Deep Learning.
Proceedings of the 54th Annual Design Automation Conference, 2017

PriSearch: Efficient Search on Private Data.
Proceedings of the 54th Annual Design Automation Conference, 2017

ASHES 2017: Workshop on Attacks and Solutions in Hardware Security.
Proceedings of the 2017 ACM SIGSAC Conference on Computer and Communications Security, CCS 2017, Dallas, TX, USA, October 30, 2017

2016
Automated Real-Time Analysis of Streaming Big and Dense Data on Reconfigurable Platforms.
TRETS, 2016

Chime: Checkpointing Long Computations on Interm ittently Energized IoT Devices.
IEEE Trans. Multi-Scale Computing Systems, 2016

A Built-in-Self-Test Scheme for Online Evaluation of Physical Unclonable Functions and True Random Number Generators.
IEEE Trans. Multi-Scale Computing Systems, 2016

Sub-linear Privacy-preserving Search with Untrusted Server and Semi-honest Parties.
CoRR, 2016

DeLight: Adding Energy Dimension To Deep Neural Networks.
Proceedings of the 2016 International Symposium on Low Power Electronics and Design, 2016

Robust privacy-preserving fingerprint authentication.
Proceedings of the 2016 IEEE International Symposium on Hardware Oriented Security and Trust, 2016

GenMatch: Secure DNA compatibility testing.
Proceedings of the 2016 IEEE International Symposium on Hardware Oriented Security and Trust, 2016

CryptoML: Secure outsourcing of big data machine learning applications.
Proceedings of the 2016 IEEE International Symposium on Hardware Oriented Security and Trust, 2016

GarbledCPU: a MIPS processor for secure computation in hardware.
Proceedings of the 53rd Annual Design Automation Conference, 2016

Perform-ML: performance optimized machine learning by platform and content aware customization.
Proceedings of the 53rd Annual Design Automation Conference, 2016

Privacy preserving localization for smart automotive systems.
Proceedings of the 53rd Annual Design Automation Conference, 2016

Invited - Things, trouble, trust: on building trust in IoT systems.
Proceedings of the 53rd Annual Design Automation Conference, 2016

Going deeper than deep learning for massive data analytics under physical constraints.
Proceedings of the Eleventh IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2016

Design and performance analysis of secure and dependable cybercars: A steer-by-wire case study.
Proceedings of the 13th IEEE Annual Consumer Communications & Networking Conference, 2016

D2CyberSoft: A design automation tool for soft error analysis of Dependable Cybercars.
Proceedings of the 13th IEEE Annual Consumer Communications & Networking Conference, 2016

2015
Guest Editorial Special Section on Hardware Security and Trust.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2015

An Energy-Efficient Last-Level Cache Architecture for Process Variation-Tolerant 3D Microprocessors.
IEEE Trans. Computers, 2015

Phase Change Memory Write Cost Minimization by Data Encoding.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2015

RankMap: A Platform-Aware Framework for Distributed Learning from Dense Datasets.
CoRR, 2015

TinyGarble: Highly Compressed and Scalable Sequential Garbled Circuits.
Proceedings of the 2015 IEEE Symposium on Security and Privacy, 2015

Flexible Transformations For Learning Big Data.
Proceedings of the 2015 ACM SIGMETRICS International Conference on Measurement and Modeling of Computer Systems, 2015

DA Systemization of Knowledge: A Catalog of Prior Forward-Looking Initiatives.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2015

Evolving EDA Beyond its E-Roots: An Overview.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2015

Fine-Grained Voltage Boosting for Improving Yield in Near-Threshold Many-Core Processors.
Proceedings of the 25th edition on Great Lakes Symposium on VLSI, GLVLSI 2015, Pittsburgh, PA, USA, May 20, 2015

SSketch: An Automated Framework for Streaming Sketch-Based Analysis of Big Data on FPGA.
Proceedings of the 23rd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2015

AHEAD: automated framework for hardware accelerated iterative data analysis.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

Compacting privacy-preserving k-nearest neighbor search using logic synthesis.
Proceedings of the 52nd Annual Design Automation Conference, 2015

I Know Where You are: Proofs of Presence Resilient to Malicious Provers.
Proceedings of the 10th ACM Symposium on Information, 2015

Automated Synthesis of Optimized Circuits for Secure Computation.
Proceedings of the 22nd ACM SIGSAC Conference on Computer and Communications Security, 2015

2014
Robust and Reverse-Engineering Resilient PUF Authentication and Key-Exchange by Substring Matching.
IEEE Trans. Emerging Topics Comput., 2014

Processor-Based Strong Physical Unclonable Functions With Aging-Based Response Tuning.
IEEE Trans. Emerging Topics Comput., 2014

Novel Techniques for High-Sensitivity Hardware Trojan Detection Using Thermal and Power Maps.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2014

A Primer on Hardware Security: Models, Methods, and Metrics.
Proceedings of the IEEE, 2014

Trustworthy Hardware [Scanning the Issue].
Proceedings of the IEEE, 2014

Physical Unclonable Functions and Applications: A Tutorial.
Proceedings of the IEEE, 2014

A queueing theoretic approach for performance evaluation of low-power multi-core embedded systems.
J. Parallel Distrib. Comput., 2014

Automated Design, Implementation, and Evaluation of Arbiter-based PUF on FPGA using Programmable Delay Lines.
IACR Cryptology ePrint Archive, 2014

Shielding and securing integrated circuits with sensors.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2014

BIST-PUF: online, hardware-based evaluation of physically unclonable circuit identifiers.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2014

Quo vadis, PUF?: Trends and challenges of emerging physical-disorder based security.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

D2Cyber: A design automation tool for dependable cybercars.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

Techniques for Foundry Identification.
Proceedings of the 51st Annual Design Automation Conference 2014, 2014

PUFatt: Embedded Platform Attestation Based on Novel Processor-Based PUFs.
Proceedings of the 51st Annual Design Automation Conference 2014, 2014

Efficient Power and Timing Side Channels for Physical Unclonable Functions.
Proceedings of the Cryptographic Hardware and Embedded Systems - CHES 2014, 2014

2013
Low-power resource binding by postsilicon customization.
ACM Trans. Design Autom. Electr. Syst., 2013

High-performance optimizations on tiled many-core embedded systems: a matrix multiplication case study.
The Journal of Supercomputing, 2013

A Timing Channel Spyware for the CSMA/CA Protocol.
IEEE Trans. Information Forensics and Security, 2013

Power and Timing Side Channels for PUFs and their Efficient Exploitation.
IACR Cryptology ePrint Archive, 2013

Combined Modeling and Side Channel Attacks on Strong PUFs.
IACR Cryptology ePrint Archive, 2013

Editorial: Low-Power, Intelligent, and Secure Solutions for Realization of Internet of Things.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2013

Idetic: A high-level synthesis approach for enabling long computations on transiently-powered ASICs.
Proceedings of the 2013 IEEE International Conference on Pervasive Computing and Communications, 2013

Automated checkpointing for enabling intensive applications on energy harvesting devices.
Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED), 2013

Hardware security: threat models and metrics.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2013

ClockPUF: physical unclonable functions based on clock networks.
Proceedings of the Design, Automation and Test in Europe, 2013

High-sensitivity hardware trojan detection using multimodal characterization.
Proceedings of the Design, Automation and Test in Europe, 2013

Balancing security and utility in medical devices?
Proceedings of the 50th Annual Design Automation Conference 2013, 2013

Heart-to-heart (H2H): authentication for implanted medical devices.
Proceedings of the 2013 ACM SIGSAC Conference on Computer and Communications Security, 2013

CyCAR'2013: first international academic workshop on security, privacy and dependability for cybervehicles.
Proceedings of the 2013 ACM SIGSAC Conference on Computer and Communications Security, 2013

2012
Gate Characterization Using Singular Value Decomposition: Foundations and Applications.
IEEE Trans. Information Forensics and Security, 2012

Provably Secure Active IC Metering Techniques for Piracy Avoidance and Digital Rights Management.
IEEE Trans. Information Forensics and Security, 2012

Slender PUF Protocol: A Lightweight, Robust, and Secure Authentication by Substring Matching.
Proceedings of the 2012 IEEE Symposium on Security and Privacy Workshops, 2012

Provably complete hardware Trojan detection using test point insertion.
Proceedings of the 2012 IEEE/ACM International Conference on Computer-Aided Design, 2012

Hardware Trojan horse benchmark via optimal creation and placement of malicious circuitry.
Proceedings of the 49th Annual Design Automation Conference 2012, 2012

Coding-based energy minimization for phase change memory.
Proceedings of the 49th Annual Design Automation Conference 2012, 2012

EDA for secure and dependable cybercars: challenges and opportunities.
Proceedings of the 49th Annual Design Automation Conference 2012, 2012

Can EDA combat the rise of electronic counterfeiting?
Proceedings of the 49th Annual Design Automation Conference 2012, 2012

2011
Time-Bounded Authentication of FPGAs.
IEEE Trans. Information Forensics and Security, 2011

A Unified Framework for Multimodal Submodular Integrated Circuits Trojan Detection.
IEEE Trans. Information Forensics and Security, 2011

Learning to manage combined energy supply systems.
Proceedings of the 2011 International Symposium on Low Power Electronics and Design, 2011

Ultra-low power current-based PUF.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

Hybrid heterogeneous energy supply networks.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

Integrated circuits metering for piracy protection and digital rights management: an overview.
Proceedings of the 21st ACM Great Lakes Symposium on VLSI 2010, 2011

Integrated circuit digital rights management techniques using physical level characterization.
Proceedings of the 11th ACM Workshop on Digital Rights Management, 2011

HypoEnergy. Hybrid supercapacitor-battery power-supply optimization for Energy efficiency.
Proceedings of the Design, Automation and Test in Europe, 2011

Hybrid modeling of non-stationary process variations.
Proceedings of the 48th Design Automation Conference, 2011

FPGA-Based True Random Number Generation Using Circuit Metastability with Adaptive Feedback Control.
Proceedings of the Cryptographic Hardware and Embedded Systems - CHES 2011 - 13th International Workshop, Nara, Japan, September 28, 2011

Trusting the open latent IC backdoors.
Proceedings of the sixth ACM workshop on Scalable trusted computing, 2011

2010
Nonparametric combinatorial regression for shape constrained modeling.
IEEE Trans. Signal Processing, 2010

A Survey of Hardware Trojan Taxonomy and Detection.
IEEE Design & Test of Computers, 2010

Guest Editors' Introduction: Confronting the Hardware Trustworthiness Problem.
IEEE Design & Test of Computers, 2010

Ending Piracy of Integrated Circuits.
IEEE Computer, 2010

FPGA PUF using programmable delay lines.
Proceedings of the 2010 IEEE International Workshop on Information Forensics and Security, 2010

Rapid FPGA delay characterization using clock synthesis and sparse sampling.
Proceedings of the 2011 IEEE International Test Conference, 2010

FPGA Time-Bounded Unclonable Authentication.
Proceedings of the Information Hiding - 12th International Conference, 2010

A Unified Submodular Framework for Multimodal IC Trojan Detection.
Proceedings of the Information Hiding - 12th International Conference, 2010

Provably Secure Obfuscation of Diverse Watermarks for Sequential Circuits.
Proceedings of the HOST 2010, 2010

Real time emulations: foundation and applications.
Proceedings of the 47th Design Automation Conference, 2010

Hierarchical hybrid power supply networks.
Proceedings of the 47th Design Automation Conference, 2010

2009
Techniques for Design and Implementation of Secure Reconfigurable PUFs.
TRETS, 2009

N-version temperature-aware scheduling and binding.
Proceedings of the 2009 International Symposium on Low Power Electronics and Design, 2009

SVD-Based Ghost Circuitry Detection.
Proceedings of the Information Hiding, 11th International Workshop, 2009

Consistency-based characterization for IC Trojan detection.
Proceedings of the 2009 International Conference on Computer-Aided Design, 2009

Robust Stable Radiometric Fingerprinting for Frequency Reconfigurable Devices.
Proceedings of the IEEE International Workshop on Hardware-Oriented Security and Trust, 2009

2008
Challenging benchmark for location discovery in ad hoc networks: foundations and applications.
Proceedings of the 9th ACM Interational Symposium on Mobile Ad Hoc Networking and Computing, 2008

Testing Techniques for Hardware Security.
Proceedings of the 2008 IEEE International Test Conference, 2008

Noninvasive leakage power tomography of integrated circuits by compressive sensing.
Proceedings of the 2008 International Symposium on Low Power Electronics and Design, 2008

Trusted Integrated Circuits: A Nondestructive Hidden Characteristics Extraction Approach.
Proceedings of the Information Hiding, 10th International Workshop, 2008

Lightweight secure PUFs.
Proceedings of the 2008 International Conference on Computer-Aided Design, 2008

Post-silicon timing characterization by compressed sensing.
Proceedings of the 2008 International Conference on Computer-Aided Design, 2008

Circuit CAD Tools as a Security Threat.
Proceedings of the IEEE International Workshop on Hardware-Oriented Security and Trust, 2008

Designer's Hardware Trojan Horse.
Proceedings of the IEEE International Workshop on Hardware-Oriented Security and Trust, 2008

EPIC: Ending Piracy of Integrated Circuits.
Proceedings of the Design, Automation and Test in Europe, 2008

Protecting bus-based hardware IP by secret sharing.
Proceedings of the 45th Design Automation Conference, 2008

(Bio)-behavioral CAD.
Proceedings of the 45th Design Automation Conference, 2008

Input vector control for post-silicon leakage current minimization in the presence of manufacturing variability.
Proceedings of the 45th Design Automation Conference, 2008

N-variant IC design: methodology and applications.
Proceedings of the 45th Design Automation Conference, 2008

Active control and digital rights management of integrated circuit IP cores.
Proceedings of the 2008 International Conference on Compilers, 2008

2007
Techniques for maintaining connectivity in wireless ad-hoc networks under energy constraints.
ACM Trans. Embedded Comput. Syst., 2007

Active Hardware Metering for Intellectual Property Protection and Security.
Proceedings of the 16th USENIX Security Symposium, Boston, MA, USA, August 6-10, 2007, 2007

Integration of Statistical Techniques in the Design Curriculum.
Proceedings of the IEEE International Conference on Microelectronic Systems Education, 2007

Hardware Security: Preparing Students for the Next Design Frontier.
Proceedings of the IEEE International Conference on Microelectronic Systems Education, 2007

Anti-Collusion Position Estimation in Wireless Sensor Networks.
Proceedings of the IEEE 4th International Conference on Mobile Adhoc and Sensor Systems, 2007

LaserSPECks: : laser SPECtroscopic trace-gas sensor networks - sensor integration and applications.
Proceedings of the 6th International Conference on Information Processing in Sensor Networks, 2007

Remote activation of ICs for piracy prevention and digital right management.
Proceedings of the 2007 International Conference on Computer-Aided Design, 2007

CAD-based Security, Cryptography, and Digital Rights Management.
Proceedings of the 44th Design Automation Conference, 2007

2006
Sleeping Coordination for Comprehensive Sensing Using Isotonic Regression and Domatic Partitions.
Proceedings of the INFOCOM 2006. 25th IEEE International Conference on Computer Communications, 2006

2005
Behavioral synthesis techniques for intellectual property protection.
ACM Trans. Design Autom. Electr. Syst., 2005

Worst and Best-Case Coverage in Sensor Networks.
IEEE Trans. Mob. Comput., 2005

Flexible ASIC: shared masking for multiple media processors.
Proceedings of the 42nd Design Automation Conference, 2005

2004
Probabilistic constructive optimization techniques.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2004

2003
Low power coordination in wireless ad-hoc networks.
Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003

2002
Exposure in Wireless Sensor Networks: Theory and Practical Solutions.
Wireless Networks, 2002

System-Architectures for Sensor Networks Issues, Alternatives, and Directions.
Proceedings of the 20th International Conference on Computer Design (ICCD 2002), 2002

Global error-tolerant algorithms for location discovery in ad-hoc wireless Netoworks.
Proceedings of the IEEE International Conference on Acoustics, 2002

ILP-based engineering change.
Proceedings of the 39th Design Automation Conference, 2002

2001
Symbolic debugging of embedded hardware and software.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2001

Exposure in wireless Ad-Hoc sensor networks.
Proceedings of the MOBICOM 2001, 2001

Coverage Problems in Wireless Ad-hoc Sensor Networks.
Proceedings of the Proceedings IEEE INFOCOM 2001, 2001

Intellectual Property Metering.
Proceedings of the Information Hiding, 4th International Workshop, 2001

A Probabilistic Constructive Approach to Optimization Problems.
Proceedings of the 2001 IEEE/ACM International Conference on Computer-Aided Design, 2001

MetaCores: Design and Optimization Techniques.
Proceedings of the 38th Design Automation Conference, 2001

Hardware Metering.
Proceedings of the 38th Design Automation Conference, 2001

2000
Processors for Mobile Applications.
Proceedings of the IEEE International Conference On Computer Design: VLSI In Computers & Processors, 2000

Challenges and Opportunities in Broadband and Wireless Communication Designs.
Proceedings of the 2000 IEEE/ACM International Conference on Computer-Aided Design, 2000

Symbolic Debugging Scheme for Optimized Hardware and Software.
Proceedings of the 2000 IEEE/ACM International Conference on Computer-Aided Design, 2000

GTX: the MARCO GSRC technology extrapolation system.
Proceedings of the 37th Conference on Design Automation, 2000


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