Raghul Saravanan

According to our database, Raghul Saravanan authored at least 6 papers between 2023 and 2025.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2025

SynFuzz: Leveraging Fuzzing of Netlist to Detect Synthesis Bugs.

Raghul Saravanan, Sudipta Paria, Aritra Dasgupta, Venkat Nitin Patnala, Swarup Bhunia, Sai Manoj PD

CoRR, April, 2025

2024

Accelerating Hardware Verification with Graph Models.

Raghul Saravanan, Sreenitha Kasarapu, Sai Manoj Pudukotai Dinakarrao

CoRR, 2024

The Emergence of Hardware Fuzzing: A Critical Review of its Significance.

Raghul Saravanan, Sai Manoj Pudukotai Dinakarrao

CoRR, 2024

Exploring Coverage Metrics in Hardware Fuzzing: A Comprehensive Analysis.

Raghul Saravanan, Sai Manoj Pudukotai Dinakarrao

Proceedings of the Great Lakes Symposium on VLSI 2024, 2024

The Fuzz Odyssey: A Survey on Hardware Fuzzing Frameworks for Hardware Design Verification.

Raghul Saravanan, Sai Manoj Pudukotai Dinakarrao

Proceedings of the Great Lakes Symposium on VLSI 2024, 2024

2023

Reconfigurable FET Approximate Computing-based Accelerator for Deep Learning Applications.

Raghul Saravanan, Sathwika Bavikadi, Shubham Rai, Akash Kumar, Sai Manoj Pudukotai Dinakarrao

Proceedings of the IEEE International Symposium on Circuits and Systems, 2023