Rainer Buchty

According to our database1, Rainer Buchty authored at least 40 papers between 2002 and 2017.

Collaborative distances :
  • Dijkstra number2 of four.
  • Erdős number3 of four.



In proceedings 
PhD thesis 


On csauthors.net:


A bandwidth accurate, flexible and rapid simulating multi-HMC modeling tool.
Proceedings of the International Symposium on Memory Systems, 2017

A Scriptable Standard-Compliant Reporting and Logging Framework for SystemC.
ACM Trans. Embedded Comput. Syst., 2016

Data-Centric Computing Frontiers: A Survey On Processing-In-Memory.
Proceedings of the Second International Symposium on Memory Systems, 2016

Towards bridging the gap between academic and industrial heterogeneous system architecture design space exploration.
Proceedings of the 2016 Workshop on Rapid Simulation and Performance Evaluation, 2016

A scriptable, standards-compliant reporting and logging extension for SystemC.
Proceedings of the 2015 International Conference on Embedded Computer Systems: Architectures, 2015

Revealing Potential Performance Improvements by Utilizing Hybrid Work-Sharing for Resource-Intensive Seismic Applications.
Proceedings of the 23rd Euromicro International Conference on Parallel, 2015

SoCRocket - A virtual platform for the European Space Agency's SoC development.
Proceedings of the 9th International Symposium on Reconfigurable and Communication-Centric Systems-on-Chip, 2014

On RTL to TLM Abstraction to Benefit Simulation Performance and Modeling Productivity in NoC Design Exploration.
Proceedings of the 2014 International Workshop on Network on Chip Architectures, 2014

Designing a low-power wireless sensor node rASIP architecture.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2013

Safe Virtual Interrupts Leveraging Distributed Shared Resources and Core-to-Core Communication on Many-Core Platforms.
Proceedings of the IEEE 19th Pacific Rim International Symposium on Dependable Computing, 2013

Efficient Barrier Synchronization for OpenMP-Like Parallelism on the Intel SCC.
Proceedings of the 19th IEEE International Conference on Parallel and Distributed Systems, 2013

Power Monitoring for Mixed-Criticality on a Many-Core Platform.
Proceedings of the Architecture of Computing Systems - ARCS 2013, 2013

Seamlessly portable applications: Managing the diversity of modern heterogeneous systems.
TACO, 2012

A survey on hardware-aware and heterogeneous computing on multicore processors and accelerators.
Concurrency and Computation: Practice and Experience, 2012

IDAMC: A Many-Core Platform with Run-Time Monitoring for Mixed-Criticality.
Proceedings of the 14th International IEEE Symposium on High-Assurance Systems Engineering, 2012

Cost-aware function migration in heterogeneous systems.
Proceedings of the High Performance Embedded Architectures and Compilers, 2011

A Light-Weight Approach for Online State Classification of Self-organizing Parallel Systems.
Proceedings of the Architecture of Computing Systems - ARCS 2011, 2011

Monitoring and Self-awareness for Heterogeneous, Adaptive Computing Systems.
Proceedings of the Organic Computing - A Paradigm Shift for Complex Systems, 2011

Delivering Guidance Information in Heterogeneous Systems.
Proceedings of the ARCS '10, 2010

A Tightly Coupled Accelerator Infrastructure for Exact Arithmetics.
Proceedings of the Architecture of Computing Systems, 2010

Extending a Light-weight Runtime System by Dynamic Instrumentation for Performance Evaluation.
Proceedings of the ARCS '10, 2010

An Embrace-and-Extend Approach to Managing the Complexity of Future Heterogeneous Systems.
Proceedings of the Embedded Computer Systems: Architectures, 2009

A Light-Weight Approach to Dynamical Runtime Linking Supporting Heterogenous, Parallel, and Reconfigurable Architectures.
Proceedings of the Architecture of Computing Systems, 2009

A Seamless Virtualization Approach for Transparent Dynamical Function Mapping Targeting Heterogeneous and Reconfigurable Systems.
Proceedings of the Reconfigurable Computing: Architectures, 2009

Design Aspects of Self-Organizing Heterogeneous Multi-Core Architectures (Entwurfsaspekte selbstorganisierender, heterogener Multicore-Architekturen).
it - Information Technology, 2008

Performance Advantage of Reconfigurable Cache Design on Multicore Processor Systems.
International Journal of Parallel Programming, 2008

An Organic Computing Approach to Sustained Real-time Monitoring.
Proceedings of the Biologically-Inspired Collaborative Computing, 2008

Adaptive Cache Infrastructure: Supporting Dynamic Program Changes following Dynamic Program Behavior.
Proceedings of the 9th Workshop on Parallel Systems and Algorithms (PASA) held at the 21st Conference on the Architecture of Computing Systems (ARCS), 2008

Self-aware Memory: Managing Distributed Memory in an Autonomous Multi-master Environment.
Proceedings of the Architecture of Computing Systems, 2008

A Run-time Reconfigurable Cache Architecture.
Proceedings of the Parallel Computing: Architectures, 2007

Optimizing Cache Performance of the Discrete Wavelet Transform Using a Visualization Tool.
Proceedings of the Ninth IEEE International Symposium on Multimedia, 2007

Automatic Data Locality Optimization Through Self-optimization.
Proceedings of the Self-Organizing Systems, First International Workshop, 2006

A Monitoring Infrastructure for the Digital on-demand Computing Organism (DodOrg).
Proceedings of the Self-Organizing Systems, First International Workshop, 2006

Reconfigurable Architectures and Instruction Sets: Programmability, Code Generation, and Program Execution.
Proceedings of the Dynamically Reconfigurable Architectures, 02.04. - 07.04.2006, 2006

A network agent for diagnosis and analysis of real-time Ethernet networks.
Proceedings of the 2006 International Conference on Compilers, 2006

CPU-independent Assembler in an FPGA.
Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), 2005

Cryptonite - A Programmable Crypto Processor Architecture for High-Bandwidth Applications.
Proceedings of the Organic and Pervasive Computing, 2004

Modelling Cryptonite - On the Design of a Programmable High-Performance Crypto Processor.
Proceedings of the ARCS 2004, 2004

AES and the cryptonite crypto processor.
Proceedings of the International Conference on Compilers, 2003

Cryptonite: a programmable crypto processor architecture for high bandwidth applications.
PhD thesis, 2002