Jonas Diemer

According to our database, Jonas Diemer authored at least 18 papers between 2009 and 2017.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2017

Networked Real-Time Embedded Systems.

Haibo Zeng, Prachi Joshi, Daniel Thiele, Jonas Diemer, Philip Axer, Rolf Ernst, Petru Eles

Proceedings of the Handbook of Hardware/Software Codesign., 2017

2015

Formal worst-case timing analysis of Ethernet TSN's time-aware and peristaltic shapers.

Daniel Thiele, Rolf Ernst, Jonas Diemer

Proceedings of the 2015 IEEE Vehicular Networking Conference, 2015

2014

FMEA-based analysis of a Network-on-Chip for mixed-critical systems.

Eberle A. Rambo, Alexander Tschiene, Jonas Diemer, Leonie Ahrendts, Rolf Ernst

Proceedings of the Eighth IEEE/ACM International Symposium on Networks-on-Chip, 2014

Failure analysis of a network-on-chip for real-time mixed-critical systems.

Eberle A. Rambo, Alexander Tschiene, Jonas Diemer, Leonie Ahrendts, Rolf Ernst

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

Exploiting Shaper Context to Improve Performance Bounds of Ethernet AVB Networks.

Philip Axer, Daniel Thiele, Rolf Ernst, Jonas Diemer

Proceedings of the 51st Annual Design Automation Conference 2014, 2014

2013

IDAMC: A NoC for mixed criticality systems.

Sebastian Tobuschat, Philip Axer, Rolf Ernst, Jonas Diemer

Proceedings of the 2013 IEEE 19th International Conference on Embedded and Real-Time Computing Systems and Applications, 2013

Safe Virtual Interrupts Leveraging Distributed Shared Resources and Core-to-Core Communication on Many-Core Platforms.

Boris Motruk, Jonas Diemer, Philip Axer, Rainer Buchty, Mladen Berekovic

Proceedings of the IEEE 19th Pacific Rim International Symposium on Dependable Computing, 2013

Improved formal worst-case timing analysis of weighted round robin scheduling for Ethernet.

Daniel Thiele, Jonas Diemer, Philip Axer, Rolf Ernst, Jan R. Seyler

Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis, 2013

Power Monitoring for Mixed-Criticality on a Many-Core Platform.

Boris Motruk, Jonas Diemer, Rainer Buchty, Mladen Berekovic

Proceedings of the Architecture of Computing Systems - ARCS 2013, 2013

2012

Formal worst-case timing analysis of Ethernet topologies with strict-priority and AVB switching.

Jonas Diemer, Daniel Thiele, Rolf Ernst

Proceedings of the 7th IEEE International Symposium on Industrial Embedded Systems, 2012

Exploring the worst-case timing of Ethernet AVB for industrial applications.

Jonas Diemer, Jonas Rox, Rolf Ernst, Feng Chen, Karl-Theo Kremer, Kai Richter

Proceedings of the 38th Annual Conference on IEEE Industrial Electronics Society, 2012

IDAMC: A Many-Core Platform with Run-Time Monitoring for Mixed-Criticality.

Boris Motruk, Jonas Diemer, Rainer Buchty, Rolf Ernst, Mladen Berekovic

Proceedings of the 14th International IEEE Symposium on High-Assurance Systems Engineering, 2012

2011

Mastering MPSoCs for Mixed-critical Applications.

Philip Axer, Jonas Diemer, Mircea Negrean, Maurice Sebastian, Simon Schliecker, Rolf Ernst

IPSJ Trans. Syst. LSI Des. Methodol., 2011

Real-time communication analysis for networks with two-stage arbitration.

Jonas Diemer, Jonas Rox, Mircea Negrean, Steffen Stein, Rolf Ernst

Proceedings of the 11th International Conference on Embedded Software, 2011

2010

Back Suction: Service Guarantees for Latency-Sensitive On-chip Networks.

Jonas Diemer, Rolf Ernst

Proceedings of the NOCS 2010, 2010

A Polynomial-Time Algorithm for Computing Response Time Bounds in Static Priority Scheduling Employing Multi-linear Workload Bounds.

Steffen Stein, Matthias Ivers, Jonas Diemer, Rolf Ernst

Proceedings of the 22nd Euromicro Conference on Real-Time Systems, 2010

Efficient throughput-guarantees for latency-sensitive networks-on-chip.

Jonas Diemer, Rolf Ernst, Michael Kauschke

Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010

2009

A link arbitration scheme for quality of service in a latency-optimized network-on-chip.

Jonas Diemer, Rolf Ernst

Proceedings of the Design, Automation and Test in Europe, 2009