Philip Axer

According to our database1, Philip Axer authored at least 23 papers between 2011 and 2017.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2017
Networked Real-Time Embedded Systems.
Proceedings of the Handbook of Hardware/Software Codesign., 2017

2016
Performance of time-critical embedded systems under the influence of errors and error handling protocols.
PhD thesis, 2016

Formal timing analysis of CAN-to-Ethernet gateway strategies in automotive networks.
Real-Time Systems, 2016

2015
Multi-layer software reliability for unreliable hardware.
it - Information Technology, 2015

Improving formal timing analysis of switched ethernet by exploiting FIFO scheduling.
Proceedings of the 52nd Annual Design Automation Conference, 2015

2014
Building timing predictable embedded systems.
ACM Trans. Embedded Comput. Syst., 2014

Supervised sharing of virtual channels in Networks -on-Chip.
Proceedings of the 9th IEEE International Symposium on Industrial Embedded Systems, 2014

Formal timing analysis of automatic repeat request for switched real-time networks.
Proceedings of the 9th IEEE International Symposium on Industrial Embedded Systems, 2014

Exploiting Shaper Context to Improve Performance Bounds of Ethernet AVB Networks.
Proceedings of the 51st Annual Design Automation Conference 2014, 2014

Improving formal timing analysis of switched ethernet by exploiting traffic stream correlations.
Proceedings of the 2014 International Conference on Hardware/Software Codesign and System Synthesis, 2014

2013
Monitoring of Workload Arrival Functions for Mixed-Criticality Systems.
Proceedings of the IEEE 34th Real-Time Systems Symposium, 2013

IDAMC: A NoC for mixed criticality systems.
Proceedings of the 2013 IEEE 19th International Conference on Embedded and Real-Time Computing Systems and Applications, 2013

Safe Virtual Interrupts Leveraging Distributed Shared Resources and Core-to-Core Communication on Many-Core Platforms.
Proceedings of the IEEE 19th Pacific Rim International Symposium on Dependable Computing, 2013

Response-Time Analysis of Parallel Fork-Join Workloads with Real-Time Constraints.
Proceedings of the 25th Euromicro Conference on Real-Time Systems, 2013

Sensitivity analysis for arbitrary activation patterns in real-time systems.
Proceedings of the Design, Automation and Test in Europe, 2013

Stochastic response-time guarantee for non-preemptive, fixed-priority scheduling under errors.
Proceedings of the 50th Annual Design Automation Conference 2013, 2013

Improved formal worst-case timing analysis of weighted round robin scheduling for Ethernet.
Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis, 2013

2012
Monitoring Arbitrary Activation Patterns in Real-Time Systems.
Proceedings of the 33rd IEEE Real-Time Systems Symposium, 2012

Designing an Analyzable and Resilient Embedded Operating System.
Proceedings of the Informatik 2012, 2012

Probabilistic response time bound for CAN messages with arbitrary deadlines.
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

2011
Mastering MPSoCs for Mixed-critical Applications.
IPSJ Trans. System LSI Design Methodology, 2011

Utilizing Hidden Markov Models for Formal Reliability Analysis of Real-Time Communication Systems with Errors.
Proceedings of the 17th IEEE Pacific Rim International Symposium on Dependable Computing, 2011

Reliability analysis for MPSoCs with mixed-critical, hard real-time constraints.
Proceedings of the 9th International Conference on Hardware/Software Codesign and System Synthesis, 2011


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