Luca Fossati

According to our database1, Luca Fossati authored at least 28 papers between 2006 and 2017.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2017
Probabilistic timing analysis on time-randomized platforms for the space domain.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

2016
Data Bus Slicing for Contention-Free Multicore Real-Time Memory Systems.
Proceedings of the 11th IEEE Symposium on Industrial Embedded Systems, 2016

Contention-aware performance monitoring counte support for real-time MPSoCs.
Proceedings of the 11th IEEE Symposium on Industrial Embedded Systems, 2016

2015
Introduction to partial time composability for COTS multicores.
Proceedings of the 30th Annual ACM Symposium on Applied Computing, 2015

Seeking Time-Composable Partitions of Tasks for COTS Multicore Processors.
Proceedings of the IEEE 18th International Symposium on Real-Time Distributed Computing, 2015

2014
Multiparty Session Nets.
Proceedings of the Trustworthy Global Computing - 9th International Symposium, 2014

A Dual-Criticality Memory Controller (DCmc): Proposal and Evaluation of a Space Case Study.
Proceedings of the IEEE 35th IEEE Real-Time Systems Symposium, 2014

AHRB: A high-performance time-composable AMBA AHB bus.
Proceedings of the 20th IEEE Real-Time and Embedded Technology and Applications Symposium, 2014

SoCRocket - A virtual platform for the European Space Agency's SoC development.
Proceedings of the 9th International Symposium on Reconfigurable and Communication-Centric Systems-on-Chip, 2014

2013
Deconstructing bus access control policies for Real-Time multicores.
Proceedings of the 8th IEEE International Symposium on Industrial Embedded Systems, 2013

2012
Assessing the suitability of the NGMP multi-core processor in the space domain.
Proceedings of the 12th International Conference on Embedded Software, 2012

Intensional and Extensional Characterisation of Global Progress in the π-Calculus.
Proceedings of the CONCUR 2012 - Concurrency Theory - 23rd International Conference, 2012

2011
A reliable fault classifier for dependable systems on SRAM-based FPGAs.
Proceedings of the 17th IEEE International On-Line Testing Symposium (IOLTS 2011), 2011

The future of embedded systems at ESA: Towards adaptability and reconfigurability.
Proceedings of the 2011 NASA/ESA Conference on Adaptive Hardware and Systems, 2011

2010
Decision-Theoretic Design Space Exploration of Multiprocessor Platforms.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010

A Reliable Reconfiguration Controller for Fault-Tolerant Embedded Systems on Multi-FPGA Platforms.
Proceedings of the 25th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 2010

2009
ReSP: A Nonintrusive Transaction-Level Reflective MPSoC Simulation Platform for Design Space Exploration.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009

The Calculus of Handshake Configurations.
Proceedings of the Foundations of Software Science and Computational Structures, 2009

A real-time application design methodology for MPSoCs.
Proceedings of the Design, Automation and Test in Europe, 2009

2008
A Petri Net Model of Handshake Protocols.
Proceedings of the First Interaction and Concurrency Experiences Workshop, 2008

Concurrency emulation and analysis of parallel applications for multi-processor system-on-chip co-design.
Proceedings of the 6th International Conference on Hardware/Software Codesign and System Synthesis, 2008

The Shining embedded system design methodology based on self dynamic reconfigurable architectures.
Proceedings of the 13th Asia South Pacific Design Automation Conference, 2008

ReSP: A non-intrusive Transaction-Level Reflective MPSoC Simulation Platform for design space exploration.
Proceedings of the 13th Asia South Pacific Design Automation Conference, 2008

High-Level Modeling and Exploration of Reconfigurable MPSoCs.
Proceedings of the NASA/ESA Conference on Adaptive Hardware and Systems, 2008

2007
Automatic Parallelization of Sequential Specifications for Symmetric MPSoCs.
Proceedings of the Embedded System Design: Topics, Techniques and Trends, IFIP TC10 Working Conference: International Embedded Systems Symposium (IESS), May 30, 2007

A Framework for Reliability Assessment and Enhancement in Multi-Processor Systems-On-Chip.
Proceedings of the 22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2007), 2007

A Simple Real-Coded Extended Compact Genetic Algorithm.
Proceedings of the IEEE Congress on Evolutionary Computation, 2007

2006
Handshake Games.
Proceedings of the Second International Workshop on Developments in Computational Models, 2006


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