Ram Kelkar
According to our database1,
Ram Kelkar
authored at least 4 papers
between 1995 and 2012.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2012
IEEE J. Solid State Circuits, 2012
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012
2005
A Low Jitter Programmable Frequency Synthesizer for 4.25Gbps Serial Link Applications.
Proceedings of the Proceedings 2005 IEEE International SOC Conference, 2005
1995
Fully integrated CMOS phase-locked loop with 15 to 240 MHz locking range and ∓50 ps jitter.
IEEE J. Solid State Circuits, November, 1995