Rasmus Bo Sørensen

According to our database, Rasmus Bo Sørensen authored at least 16 papers between 2012 and 2017.

Collaborative distances:

• Dijkstra number of three.
• Erdős number of four.

2017

A resource-efficient network interface supporting low latency reconfiguration of virtual circuits in time-division multiplexing networks-on-chip.

Rasmus Bo Sørensen, Luca Pezzarossa, Martin Schoeberl, Jens Sparsø

J. Syst. Archit., 2017

2016

Time-Predictable Communication on a Time-Division Multiplexing Network-on-Chip Multicore.

Rasmus Bo Sørensen

PhD thesis, 2016

Argo: A Real-Time Network-on-Chip Architecture With an Efficient GALS Implementation.

Evangelia Kasapaki, Martin Schoeberl, Rasmus Bo Sørensen, Christoph Thomas Muller, Kees Goossens, Jens Sparsø

IEEE Trans. Very Large Scale Integr. Syst., 2016

TACLeBench: A Benchmark Collection to Support Worst-Case Execution Time Research.

Heiko Falk, Sebastian Altmeyer, Peter Hellinckx, Björn Lisper, Wolfgang Puffitsch, Christine Rochange, Martin Schoeberl, Rasmus Bo Sørensen, Peter Wägemann, Simon Wegener

Proceedings of the 16th International Workshop on Worst-Case Execution Time Analysis, 2016

State-based Communication on Time-predictable Multicore Processors.

Rasmus Bo Sørensen, Martin Schoeberl, Jens Sparsø

Proceedings of the 24th International Conference on Real-Time Networks and Systems, 2016

Avionics Applications on a Time-Predictable Chip-Multiprocessor.

André Rocha, Cláudio Silva, Rasmus Bo Sørensen, Jens Sparsø, Martin Schoeberl

Proceedings of the 24th Euromicro International Conference on Parallel, 2016

An area-efficient TDM NoC supporting reconfiguration for mode changes.

Rasmus Bo Sørensen, Luca Pezzarossa, Jens Sparsø

Proceedings of the Tenth IEEE/ACM International Symposium on Networks-on-Chip, 2016

2015

Time-division multiplexing vs network calculus: a comparison.

Wolfgang Puffitsch, Rasmus Bo Sørensen, Martin Schoeberl

Proceedings of the 23rd International Conference on Real Time Networks and Systems, 2015

Interfacing hardware accelerators to a time-division multiplexing network-on-chip.

Luca Pezzarossa, Rasmus Bo Sørensen, Martin Schoeberl, Jens Sparsø

Proceedings of the Nordic Circuits and Systems Conference, 2015

Message Passing on a Time-predictable Multicore Processor.

Rasmus Bo Sørensen, Wolfgang Puffitsch, Martin Schoeberl, Jens Sparsø

Proceedings of the IEEE 18th International Symposium on Real-Time Distributed Computing, 2015

Models of Communication for Multicore Processors.

Martin Schoeberl, Rasmus Bo Sørensen, Jens Sparsø

Proceedings of the 2015 IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing Workshops, 2015

2014

Synthesis and layout of an asynchronous network-on-chip using Standard EDA tools.

Christoph Thomas Muller, Evangelia Kasapaki, Rasmus Bo Sørensen, Jens Sparsø

Proceedings of the 2014 NORCHIP, Tampere, Finland, October 27-28, 2014, 2014

A loosely synchronizing asynchronous router for TDM-scheduled NOCs.

I. Kotleas, D. Humphreys, Rasmus Bo Sørensen, Evangelia Kasapaki, Florian Brandner, Jens Sparsø

Proceedings of the Eighth IEEE/ACM International Symposium on Networks-on-Chip, 2014

A Metaheuristic Scheduler for Time Division Multiplexed Networks-on-Chip.

Rasmus Bo Sørensen, Jens Sparsø, Mark Ruvald Pedersen, Jaspur Hojgaard

Proceedings of the 17th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing, 2014

2013

Router Designs for an Asynchronous Time-Division-Multiplexed Network-on-Chip.

Evangelia Kasapaki, Jens Sparsø, Rasmus Bo Sørensen, Kees Goossens

Proceedings of the 2013 Euromicro Conference on Digital System Design, 2013

2012

A light-weight statically scheduled network-on-chip.

Rasmus Bo Sørensen, Martin Schoeberl, Jens Sparsø

Proceedings of the NORCHIP 2012, Copenhagen, Denmark, November 12-13, 2012, 2012