Christine Rochange

Orcid: 0000-0001-7257-7114

Affiliations:
  • Paul Sabatier University, Toulouse, France


According to our database1, Christine Rochange authored at least 61 papers between 1992 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2023
Computing Execution Times With Execution Decision Diagrams in the Presence of Out-of-Order Resources.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., November, 2023

MINOTAuR: A Timing Predictable RISC-V Core Featuring Speculative Execution.
IEEE Trans. Computers, 2023

Warp-Level CFG Construction for GPU Kernel WCET Analysis.
Proceedings of the 21th International Workshop on Worst-Case Execution Time Analysis, 2023

Validation of Processor Timing Models Using Cycle-Accurate Timing Simulators.
Proceedings of the 21th International Workshop on Worst-Case Execution Time Analysis, 2023

Enabling timing predictability in the presence of store buffers.
Proceedings of the 31st International Conference on Real-Time Networks and Systems, 2023

2022
A Framework for Calculating WCET Based on Execution Decision Diagrams.
ACM Trans. Embed. Comput. Syst., 2022

2021
Speculative Execution and Timing Predictability in an Open Source RISC-V Core.
Proceedings of the 42nd IEEE Real-Time Systems Symposium, 2021

2020
Improving the Performance of WCET Analysis in the Presence of Variable Latencies.
Proceedings of the 21st ACM SIGPLAN/SIGBED International Conference on Languages, 2020

2017
EMSBench: Benchmark and Testbed for Reactive Real-Time Systems.
Leibniz Trans. Embed. Syst., 2017


2016
Parallelizing Industrial Hard Real-Time Applications for the parMERASA Multicore.
ACM Trans. Embed. Comput. Syst., 2016

Parallel Real-Time Tasks, as Viewed by WCET Analysis and Task Scheduling Approaches.
Proceedings of the 16th International Workshop on Worst-Case Execution Time Analysis, 2016

TACLeBench: A Benchmark Collection to Support Worst-Case Execution Time Research.
Proceedings of the 16th International Workshop on Worst-Case Execution Time Analysis, 2016

2015
A Framework to Quantify the Overestimations of Static WCET Analysis.
Proceedings of the 15th International Workshop on Worst-Case Execution Time Analysis, 2015

WCET and Mixed-Criticality: What does Confidence in WCET Estimations Depend Upon?.
Proceedings of the 15th International Workshop on Worst-Case Execution Time Analysis, 2015

A Hybrid Scheduling Algorithm Based on Self-Timed and Periodic Scheduling for Embedded Streaming Applications.
Proceedings of the 23rd Euromicro International Conference on Parallel, 2015

Case study: Performance and WCET analysis for parallelised avionic applications with ODC<sup>2</sup>.
Proceedings of the 13th IEEE International Conference on Industrial Informatics, 2015

2014
Building timing predictable embedded systems.
ACM Trans. Embed. Comput. Syst., 2014

Contention in Multicore Hardware Shared Resources: Understanding of the State of the Art.
Proceedings of the 14th International Workshop on Worst-Case Execution Time Analysis, 2014

Minimizing the cost of synchronisations in the WCET of real-time parallel programs.
Proceedings of the 17th International Workshop on Software and Compilers for Embedded Systems, 2014

Distributed run-time WCET controller for concurrent critical tasks in mixed-critical systems.
Proceedings of the 22nd International Conference on Real-Time Networks and Systems, 2014

Effects of structured parallelism by parallel design patterns on embedded hard real-time systems.
Proceedings of the 2014 IEEE 20th International Conference on Embedded and Real-Time Computing Systems and Applications, 2014

Self-timed Periodic Scheduling for a Cyclo-static DataFlow Model.
Proceedings of the International Conference on Computational Science, 2014

Run-Time Control to Increase Task Parallelism In Mixed-Critical Systems.
Proceedings of the 26th Euromicro Conference on Real-Time Systems, 2014

Time-Predictable Architectures.
FOCUS - Computer Engineering Series, iSTE / Wiley, ISBN: 978-1-84821-593-1, 2014

2013
Automatic WCET Analysis of Real-Time Parallel Applications.
Proceedings of the 13th International Workshop on Worst-Case Execution Time Analysis, 2013

Hardware architecture specification and constraint-based WCET computation.
Proceedings of the 8th IEEE International Symposium on Industrial Embedded Systems, 2013


Predictable Two-Level Bus Arbitration for Heterogeneous Task Sets.
Proceedings of the Architecture of Computing Systems - ARCS 2013, 2013

2012
The Split-Phase Synchronisation Technique: Reducing the Pessimism in the WCET Analysis of Parallelised Hard Real-Time Programs.
Proceedings of the 2012 IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, 2012

Time analysable synchronisation techniques for parallelised hard real-time applications.
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

2011
RTOS support for execution of parallelized hard real-time tasks on the MERASA multi-core processor.
Comput. Syst. Sci. Eng., 2011

A framework for the timing analysis of dynamic branch predictors.
Proceedings of the 19th International Conference on Real-Time and Network Systems, 2011

Predictable bus arbitration schemes for heterogeneous time-critical workloads running on multicore processors.
Proceedings of the IEEE 16th Conference on Emerging Technologies & Factory Automation, 2011

An Overview of Approaches Towards the Timing Analysability of Parallel Architecture.
Proceedings of the Bringing Theory to Practice: Predictability and Performance in Embedded Systems, 2011

2010
Architecture d'un processeur multiflot orienté temps-réel.
Tech. Sci. Informatiques, 2010

Merasa: Multicore Execution of Hard Real-Time Applications Supporting Analyzability.
IEEE Micro, 2010

A framework to experiment optimizations for real-time and embedded software
CoRR, 2010

WCET Analysis of a Parallel 3D Multigrid Solver Executed on the MERASA Multi-Core.
Proceedings of the 10th International Workshop on Worst-Case Execution Time Analysis, 2010

OTAWA: An Open Toolbox for Adaptive WCET Analysis.
Proceedings of the Software Technologies for Embedded and Ubiquitous Systems, 2010

RTOS Support for Parallel Execution of Hard Real-Time Applications on the MERASA Multi-core Processor.
Proceedings of the 13th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing, 2010

2009
A Context-Parameterized Model for Static Analysis of Execution Times.
Trans. High Perform. Embed. Archit. Compil., 2009

2008
WCET 2008 - Report from the Tool Challenge 2008 -- 8th Intl. Workshop on Worst-Case Execution Time (WCET) Analysis.
Proceedings of the 8th Intl. Workshop on Worst-Case Execution Time (WCET) Analysis, 2008

An architecture for the simultaneous execution of hard real-time threads.
Proceedings of the 2008 International Conference on Embedded Computer Systems: Architectures, 2008

A Predictable Simultaneous Multithreading Scheme for Hard Real-Time.
Proceedings of the Architecture of Computing Systems, 2008

2007
WCET 2007 Abstracts Collection - 7th Intl. Workshop on Worst-Case Execution Time (WCET) Analysis.
Proceedings of the 7th Intl. Workshop on Worst-Case Execution Time (WCET) Analysis, 2007

2006
History-based Schemes and Implicit Path Enumeration.
Proceedings of the 6th Intl. Workshop on Worst-Case Execution Time (WCET) Analysis, 2006

Modeling Instruction-Level Parallelism for WCET Evaluation.
Proceedings of the 12th IEEE Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA 2006), 2006

2005
Régulation du flot d'instructions pour des processeurs orientés temps réel.
Tech. Sci. Informatiques, 2005

A Case for Static Branch Prediction in Real-Time Systems.
Proceedings of the 11th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA 2005), 2005

A Contribution to Branch Prediction Modeling in WCET Analysi.
Proceedings of the 2005 Design, 2005

A time-predictable execution mode for superscalar pipelines with instruction prescheduling.
Proceedings of the Second Conference on Computing Frontiers, 2005

2003
Optimisations du chargement des instructions.
Tech. Sci. Informatiques, 2003

Calcul de majorants de pire temps d'exécution : état de l'art.
Tech. Sci. Informatiques, 2003

Towards Designing WCET-Predictable Processors.
Proceedings of the 3rd International Workshop on Worst-Case Execution Time Analysis, 2003

2002
Une approche pour réduire la complexité du flot de contrôle dans les programmes C.
Tech. Sci. Informatiques, 2002

2000
Architecture of Parallel and Distributed Systems.
Proceedings of the Handbook on Parallel and Distributed Processing, 2000

1999
Using the abstract interpretation technique for static pointer analysis.
SIGARCH Comput. Archit. News, 1999

1993
Performance of M3S for the SOR algorithm.
Proceedings of the PARLE '93, 1993

1992
The Design of the M3S: A Multiported Shared-Memory Multiprocessor.
Proceedings of the Proceedings Supercomputing '92, 1992

Towards a Shared-Memory Massively Parallel Multiprocessor.
Proceedings of the 19th Annual International Symposium on Computer Architecture. Gold Coast, 1992


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