Raymond A. Heald

According to our database, Raymond A. Heald authored at least 6 papers between 1994 and 2005.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2005

A 4-MB on-chip L2 cache for a 90-nm 1.6-GHz 64-bit microprocessor.

Hugh McIntyre, Dennis Wendell, K. James Lin, P. Kaushik, Suresh Seshadri, Alfred Wang, V. Sundararaman, Ping Wang, Song Kim, Wen-Jay Hsu, Hee-Choul Park, Gideon Levinsky, Jiejun Lu, M. Chirania, Raymond A. Heald, Paul Lazar, Sanjaya Dharmasena

IEEE J. Solid State Circuits, 2005

2004

Variability in sub-100nm SRAM designs.

Raymond A. Heald, Ping Wang

Proceedings of the 2004 International Conference on Computer-Aided Design, 2004

2000

A third-generation SPARC V9 64-b microprocessor.

Raymond A. Heald, Kathirgamar Aingaran, Chaim Amir, Michael Ang, Michael Boland, Pankaj Dixit, Gary Gouldsberry, Dale Greenley, Joel Grinberg, Jason M. Hart, Tim Horel, Wen-Jay Hsu, James M. Kaku, Chin Kim, Song Kim, Fabian Klass, Hang Kwan, Gary Lauterbach, Roger Lo, Hugh McIntyre, Anup Mehta, David Murata, Sophie Nguyen, Yet-Ping Pai, Subeer Patel, Ken Shin, Kenway Tam, Sai Vishwanthaiah, John Wu, Gin Yee, Eileen You

IEEE J. Solid State Circuits, 2000

1999

A new family of semidynamic and dynamic flip-flops with embedded logic for high-performance processors.

Fabian Klass, Chaim Amir, Ashutosh Das, Kathirgamar Aingaran, Cindy Truong, Richard Wang, Anup Mehta, Raymond A. Heald, Gin Yee

IEEE J. Solid State Circuits, 1999

1998

64-KByte sum-addressed-memory cache with 1.6-ns cycle and 2.6-ns latency.

Raymond A. Heald, Ken Shin, Vinita Reddy, I-Feng Kao, Masood Khan, William L. Lynch, Gary Lauterbach, Joe Petolino

IEEE J. Solid State Circuits, 1998

1994

A CMOS Circuit for Real-Time Chip Temperature Measurement.

Steven R. Boyle, Raymond A. Heald

Proceedings of the Spring COMPCON 94, Digest of Papers, San Francisco, California, USA, February 28, 1994