Kathirgamar Aingaran

According to our database1, Kathirgamar Aingaran authored at least 8 papers between 1999 and 2016.

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Bibliography

2016
Software in Silicon in the Oracle SPARC M7 processor.
Proceedings of the 2016 IEEE Hot Chips 28 Symposium (HCS), 2016

2015
M7: Oracle's Next-Generation Sparc Processor.
IEEE Micro, 2015

2005
Niagara: A 32-Way Multithreaded Sparc Processor.
IEEE Micro, 2005

2001
IC Power Distribution Challenges.
Proceedings of the 2001 IEEE/ACM International Conference on Computer-Aided Design, 2001

2000
A third-generation SPARC V9 64-b microprocessor.
IEEE J. Solid State Circuits, 2000

Coupling Noise Analysis for VLIS and ULSI Circuits.
Proceedings of the 1st International Symposium on Quality of Electronic Design (ISQED 2000), 2000

Parasitic extraction for multimillion-transistor integrated circuits: methodology and design experience.
Proceedings of the IEEE 2000 Custom Integrated Circuits Conference, 2000

1999
A new family of semidynamic and dynamic flip-flops with embedded logic for high-performance processors.
IEEE J. Solid State Circuits, 1999


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