Rebecca Pelke

Orcid: 0000-0001-5156-7072

According to our database1, Rebecca Pelke authored at least 19 papers between 2023 and 2025.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2025
Bridging the Gap: Physical PCI Device Integration Into SystemC-TLM Virtual Platforms.
CoRR, May, 2025

Optimizing Binary and Ternary Neural Network Inference on RRAM Crossbars using CIM-Explorer.
CoRR, May, 2025

Introducing Instruction-Accurate Simulators for Performance Estimation of Autotuning Workloads.
CoRR, May, 2025

Evaluating the Scalability of Binary and Ternary CNN Workloads on RRAM-based Compute-in-Memory Accelerators.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2025

High-Performance ARM-on-ARM Virtualization for Multicore SystemC-TLM-Based Virtual Platforms.
Proceedings of the Design, Automation & Test in Europe Conference, 2025

2024
QTFlow: Quantitative Timing-Sensitive Information Flow for Security-Aware Hardware Design on RTL.
CoRR, 2024

NQC²: A Non-Intrusive QEMU Code Coverage Plugin.
Proceedings of the 16th Workshop on Rapid Simulation and Performance Evaluation for Design, 2024

A Fully Automated Platform for Evaluating ReRAM Crossbars.
Proceedings of the 25th IEEE Latin American Test Symposium, 2024

CLSA-CIM: A Cross-Layer Scheduling Approach for Computing-in-Memory Architectures.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024

Towards High-Performance Virtual Platforms: A Parallelization Strategy for SystemC TLM-2.0 CPU Models.
Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024

NVM-Flip: Non-Volatile-Memory BitFlips on the System Level.
Proceedings of the 2024 ACM Workshop on Secure and Trustworthy Cyber-Physical Systems, 2024

A Calibratable Model for Fast Energy Estimation of MVM Operations on RRAM Crossbars.
Proceedings of the 6th IEEE International Conference on AI Circuits and Systems, 2024

2023
Architecture-Compiler Co-design for ReRAM-Based Multi-core CIM Architectures.
Proceedings of the VLSI-SoC 2023: Innovations for Trustworthy Artificial Intelligence, 2023

Mapping of CNNs on multi-core RRAM-based CIM architectures.
Proceedings of the 31st IFIP/IEEE International Conference on Very Large Scale Integration, 2023

Invited Paper: A Holistic Fault Injection Platform for Neuromorphic Hardware.
Proceedings of the 24th IEEE Latin American Test Symposium, 2023

Entropy-Based Analysis of Benchmarks for Instruction Set Simulators.
Proceedings of the DroneSE and RAPIDO: System Engineering for constrained embedded systems, 2023

Fault Injection in Native Logic-in-Memory Computation on Neuromorphic Hardware.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

Work-in-Progress: A Universal Instrumentation Platform for Non-Volatile Memories.
Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis, 2023

Work-in-Progress: A Generic Non-Intrusive Parallelization Approach for SystemC TlM-2.0-Based Virtual Platforms.
Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis, 2023


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