Ivan Fernandez

Orcid: 0000-0001-6133-5670

According to our database1, Ivan Fernandez authored at least 24 papers between 2014 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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Online presence:

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Bibliography

2024
Accelerating Graph Neural Networks on Real Processing-In-Memory Systems.
CoRR, 2024

MATSA: An MRAM-Based Energy-Efficient Accelerator for Time Series Analysis.
IEEE Access, 2024

2023
Time series analysis acceleration with advanced vectorization extensions.
J. Supercomput., June, 2023

ALP: Alleviating CPU-Memory Data Movement Overheads in Memory-Centric Systems.
IEEE Trans. Emerg. Top. Comput., 2023

SpChar: Characterizing the Sparse Puzzle via Decision Trees.
CoRR, 2023

2022
SparseP: Towards Efficient Sparse Matrix Vector Multiplication on Real Processing-In-Memory Architectures.
Proc. ACM Meas. Anal. Comput. Syst., 2022

TraTSA: A Transprecision Framework for Efficient Time Series Analysis.
J. Comput. Sci., 2022

Accelerating Time Series Analysis via Processing using Non-Volatile Memories.
CoRR, 2022

Towards Efficient Sparse Matrix Vector Multiplication on Real Processing-In-Memory Systems.
CoRR, 2022

SparseP: Towards Efficient Sparse Matrix Vector Multiplication on Real Processing-In-Memory Systems.
CoRR, 2022

Benchmarking a New Paradigm: Experimental Analysis and Characterization of a Real Processing-in-Memory System.
IEEE Access, 2022

Towards Efficient Sparse Matrix Vector Multiplication on Real Processing-In-Memory Architectures.
Proceedings of the SIGMETRICS/PERFORMANCE '22: ACM SIGMETRICS/IFIP PERFORMANCE Joint International Conference on Measurement and Modeling of Computer Systems, Mumbai, India, June 6, 2022

Exploiting Vector Extennsions to Accelerate Time Series Analysis.
Proceedings of the 30th Euromicro International Conference on Parallel, 2022

SparseP: Efficient Sparse Matrix Vector Multiplication on Real Processing-In-Memory Architectures.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2022

Exploiting Near-Data Processing to Accelerate Time Series Analysis.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2022

2021
Enabling fast and energy-efficient FM-index exact matching using processing-near-memory.
J. Supercomput., 2021

Benchmarking a New Paradigm: An Experimental Analysis of a Real Processing-in-Memory Architecture.
CoRR, 2021

DAMOV: A New Methodology and Benchmark Suite for Evaluating Data Movement Bottlenecks.
IEEE Access, 2021

SynCron: Efficient Synchronization Support for Near-Data-Processing Architectures.
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2021

Benchmarking Memory-Centric Computing Systems: Analysis of Real Processing-In-Memory Hardware.
Proceedings of the 12th International Green and Sustainable Computing Workshops, 2021

2020
Energy-Efficient Time Series Analysis Using Transprecision Computing.
Proceedings of the 32nd IEEE International Symposium on Computer Architecture and High Performance Computing, 2020

NATSA: A Near-Data Processing Accelerator for Time Series Analysis.
Proceedings of the 38th IEEE International Conference on Computer Design, 2020

2019
Accelerating time series motif discovery in the Intel Xeon Phi KNL processor.
J. Supercomput., 2019

2014
Optimized spectrally efficient transceiver for 400-Gb/s single carrier transport.
Proceedings of the European Conference on Optical Communication, 2014


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