Vojtech Mrazek
Orcid: 0000-0002-9399-9313
According to our database1,
Vojtech Mrazek
authored at least 57 papers
between 2014 and 2023.
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Bibliography
2023
Acceleration Techniques for Automated Design of Approximate Convolutional Neural Networks.
IEEE J. Emerg. Sel. Topics Circuits Syst., March, 2023
autoXFPGAs: An End-to-End Automated Exploration Framework for Approximate Accelerators in FPGA-Based Systems.
CoRR, 2023
Xel-FPGAs: An End-to-End Automated Exploration Framework for Approximate Accelerators in FPGA-Based Systems.
Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023
Effective EEG Feature Selection for Interpretable MDD (Major Depressive Disorder) Classification.
Proceedings of the Genetic and Evolutionary Computation Conference, 2023
Proceedings of the 26th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2023
Approximation of Hardware Accelerators driven by Machine-Learning Models : (Embedded Tutorial).
Proceedings of the 26th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2023
MODEE-LID: Multiobjective Design of Energy-Efficient Hardware Accelerators for Levodopa-Induced Dyskinesia Classifiers.
Proceedings of the 26th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2023
ADEE-LID: Automated Design of Energy-Efficient Hardware Accelerators for Levodopa-Induced Dyskinesia Classifiers.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023
2022
Swarm Evol. Comput., 2022
Genet. Program. Evolvable Mach., 2022
CoRR, 2022
RoHNAS: A Neural Architecture Search Framework With Conjoint Optimization for Adversarial Robustness and Hardware Efficiency of Convolutional and Capsule Networks.
IEEE Access, 2022
Evolutionary Design of Reduced Precision Preprocessor for Levodopa-Induced Dyskinesia Classifier.
Proceedings of the Parallel Problem Solving from Nature - PPSN XVII, 2022
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2022
Proceedings of the 25th Euromicro Conference on Digital System Design, 2022
Proceedings of the 25th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2022
2021
FEECA: Design Space Exploration for Low-Latency and Energy-Efficient Capsule Network Accelerators.
IEEE Trans. Very Large Scale Integr. Syst., 2021
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021
Semantically-oriented mutation operator in cartesian genetic programming for evolutionary circuit design.
Genet. Program. Evolvable Mach., 2021
Proceedings of the Genetic Programming - 24th European Conference, 2021
2020
Improving the Accuracy and Hardware Efficiency of Neural Networks Using Approximate Multipliers.
IEEE Trans. Very Large Scale Integr. Syst., 2020
Libraries of Approximate Circuits: Automated Design and Application in CNN Accelerators.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2020
Adaptive verifiability-driven strategy for evolutionary approximation of arithmetic circuits.
Appl. Soft Comput., 2020
Satisfiability Solving Meets Evolutionary Optimisation in Designing Approximate Circuits.
Proceedings of the Theory and Applications of Satisfiability Testing - SAT 2020, 2020
NASCaps: A Framework for Neural Architecture Search to Optimize the Accuracy and Hardware Efficiency of Convolutional Capsule Networks.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020
ReD-CaNe: A Systematic Methodology for Resilience Analysis and Design of Capsule Networks under Approximations.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020
ApproxFPGAs: Embracing ASIC-Based Approximate Arithmetic Components for FPGA-Based Systems.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020
A Fast Design Space Exploration Framework for the Deep Learning Accelerators: Work-in-Progress.
Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis, 2020
Using Libraries of Approximate Circuits in Design of Hardware Accelerators of Deep Neural Networks.
Proceedings of the 2nd IEEE International Conference on Artificial Intelligence Circuits and Systems, 2020
2019
IEEE Trans. Very Large Scale Integr. Syst., 2019
ALWANN: Automatic Layer-Wise Approximation of Deep Neural Network Accelerators without Retraining.
Proceedings of the International Conference on Computer-Aided Design, 2019
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019
autoAx: An Automatic Design Space Exploration and Circuit Building Methodology utilizing Libraries of Approximate Components.
Proceedings of the 56th Annual Design Automation Conference 2019, 2019
Proceedings of the Approximate Circuits, Methodologies and CAD., 2019
2018
Scalable Construction of Approximate Multipliers With Formally Guaranteed Worst Case Error.
IEEE Trans. Very Large Scale Integr. Syst., 2018
Role of circuit representation in evolutionary design of energy-efficient approximate circuits.
IET Comput. Digit. Tech., 2018
Design Space Exploration for Approximate Implementations of Arithmetic Data Path Primitives.
Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018
Evolutionary design of large approximate adders optimized for various error criteria.
Proceedings of the Genetic and Evolutionary Computation Conference Companion, 2018
Proceedings of the Genetic and Evolutionary Computation Conference, 2018
Proceedings of the Computer Aided Verification - 30th International Conference, 2018
Design of Quality-Configurable Approximate Multipliers Suitable for Dynamic Environment.
Proceedings of the 2018 NASA/ESA Conference on Adaptive Hardware and Systems, 2018
2017
Trading between quality and non-functional properties of median filter in embedded systems.
Genet. Program. Evolvable Mach., 2017
Adaptive and Energy-Efficient Architectures for Machine Learning: Challenges, Opportunities, and Research Roadmap.
Proceedings of the 2017 IEEE Computer Society Annual Symposium on VLSI, 2017
Approximating complex arithmetic circuits with formal error guarantees: 32-bit multipliers accomplished.
Proceedings of the 2017 IEEE/ACM International Conference on Computer-Aided Design, 2017
Parallel optimization of transistor level circuits using cartesian genetic programming.
Proceedings of the Genetic and Evolutionary Computation Conference, 2017
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017
EvoApproxSb: Library of approximate adders and multipliers for circuit design and benchmarking of approximation methods.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017
2016
Proceedings of the 2016 IEEE Symposium Series on Computational Intelligence, 2016
Proceedings of the 2016 IEEE Symposium Series on Computational Intelligence, 2016
Automatic design of arbitrary-size approximate sorting networks with error guarantee.
Proceedings of the 26th International Workshop on Power and Timing Modeling, 2016
Design of power-efficient approximate multipliers for approximate artificial neural networks.
Proceedings of the 35th International Conference on Computer-Aided Design, 2016
Automatic design of approximate circuits by means of multi-objective evolutionary algorithms.
Proceedings of the 2016 International Conference on Design and Technology of Integrated Systems in Nanoscale Era, 2016
2015
Proceedings of the Genetic and Evolutionary Computation Conference, 2015
Proceedings of the Genetic Programming - 18th European Conference, 2015
Proceedings of the 13th IEEE International Conference on Embedded and Ubiquitous Computing, 2015
2014
Proceedings of the 2014 IEEE International Conference on Evolvable Systems, 2014