Risto Mäkinen

According to our database1, Risto Mäkinen authored at least 4 papers between 2006 and 2009.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2009
Parallel Memory Architecture for Application-Specific Instruction-Set Processors.
J. Signal Process. Syst., 2009

2007
Parallel Memory Architecture for TTA Processor.
Proceedings of the Embedded Computer Systems: Architectures, 2007

2006
Low-Power, High-Performance TTA Processor for 1024-Point Fast Fourier Transform.
Proceedings of the Embedded Computer Systems: Architectures, 2006

Loop Scheduling for Transport Triggered Architecture Processors.
Proceedings of the International Symposium on System-on-Chip, 2006


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