Teemu Pitkänen

According to our database1, Teemu Pitkänen authored at least 22 papers between 2005 and 2017.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2017
Codesign Case Study on Transport-Triggered Architectures.
Proceedings of the Handbook of Hardware/Software Codesign., 2017

2016
Fast nearest neighbor search through sparse random projections and voting.
Proceedings of the 2016 IEEE International Conference on Big Data, 2016

2015
Fast k-NN search.
CoRR, 2015

2014
Transport triggered architecture to perform carrier synchronization for LTE.
ACM Trans. Embedded Comput. Syst., 2014

2013
Use of compiler optimization of software bypassing as a method to improve energy efficiency of exposed data path architectures.
EURASIP J. Emb. Sys., 2013

Low-power application-specific FFT processor for LTE applications.
Proceedings of the 2013 International Conference on Embedded Computer Systems: Architectures, 2013

2012
Programmable implementations of MIMO-OFDM detectors: Design, benchmarking and comparison.
Proceedings of the 2012 IEEE International Conference on Acoustics, 2012

2011
Low-Power Application-Specific Processor for FFT Computations.
Signal Processing Systems, 2011

Design Methodology for Offloading Software Executions to FPGA.
Signal Processing Systems, 2011

Fixed- and Floating-Point Processor Comparison for MIMO-OFDM Detector.
J. Sel. Topics Signal Processing, 2011

Instruction buffer with limited control flow and loop nest support.
Proceedings of the 2011 International Conference on Embedded Computer Systems: Architectures, 2011

Effects of loop unrolling and use of instruction buffer on processor energy consumption.
Proceedings of the 2011 International Symposium on System on Chip, 2011

2010
Benchmarking and evaluating reconfigurable architectures targeting the mobile domain.
ACM Trans. Design Autom. Electr. Syst., 2010

2009
Parallel Memory Architecture for Application-Specific Instruction-Set Processors.
Signal Processing Systems, 2009

3G Long Term Evolution Baseband Processing with Application-Specific Processors.
Int. J. Digital Multimedia Broadcasting, 2009

Reducing processor energy consumption by compiler optimization.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2009

Benchmarking Reconfigurable Architectures in the Mobile Domain.
Proceedings of the FCCM 2009, 2009

2008
802.15.3 Transmitter: A Fast Design Cycle Using OFDM Framework in Bluespec.
Proceedings of the Embedded Computer Systems: Architectures, 2008

2007
Parallel Memory Architecture for TTA Processor.
Proceedings of the Embedded Computer Systems: Architectures, 2007

Low-Power Twiddle Factor Unit for FFT Computation.
Proceedings of the Embedded Computer Systems: Architectures, 2007

2006
Low-Power, High-Performance TTA Processor for 1024-Point Fast Fourier Transform.
Proceedings of the Embedded Computer Systems: Architectures, 2006

2005
Hardware Cost Estimation for Application-Specific Processor Design.
Proceedings of the Embedded Computer Systems: Architectures, 2005


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