Safar Hatami

According to our database1, Safar Hatami authored at least 21 papers between 2003 and 2014.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2014
Single-Bit Pseudoparallel Processing Low-Oversampling Delta-Sigma Modulator Suitable for SDR Wireless Transmitters.
IEEE Trans. Very Large Scale Integr. Syst., 2014

2013
Design and Multicorner Optimization of the Energy-Delay Product of CMOS Flip-Flops Under the Negative Bias Temperature Instability Effect.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013

2012
Concurrent optimization of consumer's electrical energy bill and producer's power generation cost under a dynamic pricing model.
Proceedings of the IEEE PES Innovative Smart Grid Technologies Conference, 2012

2011
Demand-side load scheduling incentivized by dynamic energy prices.
Proceedings of the IEEE Second International Conference on Smart Grid Communications, 2011

Multi-objective optimization techniques for VLSI circuits.
Proceedings of the 12th International Symposium on Quality Electronic Design, 2011

2010
Multi-corner, energy-delay optimized, NBTI-aware flip-flop design.
Proceedings of the 11th International Symposium on Quality of Electronic Design (ISQED 2010), 2010

Analysis and optimization of sequential circuit element to combat single-event timing upsets.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

Efficient representation, stratification, and compression of variational CSM library waveforms using Robust Principle Component Analysis.
Proceedings of the Design, Automation and Test in Europe, 2010

2009
Efficient compression and handling of current source model library waveforms.
Proceedings of the Design, Automation and Test in Europe, 2009

2008
Wavelet-based dynamic power management for nonstationary service requests.
ACM Trans. Design Autom. Electr. Syst., 2008

A Novel Architecture of Delta-Sigma Modulator Enabling All-Digital Multiband Multistandard RF Transmitters Design.
IEEE Trans. Circuits Syst. II Express Briefs, 2008

Characterization and design of sequential circuit elements to combat soft error.
Proceedings of the 26th International Conference on Computer Design, 2008

Statistical timing analysis of flip-flops considering codependent setup and hold times.
Proceedings of the 18th ACM Great Lakes Symposium on VLSI 2008, 2008

NBTI-aware flip-flop characterization and design.
Proceedings of the 18th ACM Great Lakes Symposium on VLSI 2008, 2008

A Current Source Model for CMOS Logic Cells Considering Multiple Input Switching and Stack Effect.
Proceedings of the Design, Automation and Test in Europe, 2008

2005
Wavelet based fingerprint image enhancement.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Real-time image compression based on wavelet vector quantization, algorithm and VLSI architecture.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

A low-power scan-path architecture.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

2004
Accurate and efficient modeling of SOI MOSFET with technology independent neural networks.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2004

Event-driven dynamic power management based on wavelet forecasting theory.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

2003
A modified method for codebook design with neural network in VQ sed image compression.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003


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