Saroj Satapathy

According to our database1, Saroj Satapathy authored at least 6 papers between 2014 and 2024.

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Bibliography

2024
Advancing Low-Voltage Complementary Reconfigurable Field-Effect Transistor Operation with Reduced Schottky Barriers.
Proceedings of the Device Research Conference, 2024

2022
Aging Effects On Clock Gated Memory Phase Paths.
Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2022

2016
Soft Response Generation and Thresholding Strategies for Linear and Feed-Forward MUX PUFs.
Proceedings of the 2016 International Symposium on Low Power Electronics and Design, 2016

Estimating delay differences of arbiter PUFs using silicon data.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

2015
A revolving reference odometer circuit for BTI-induced frequency fluctuation measurements under fast DVFS transients.
Proceedings of the IEEE International Reliability Physics Symposium, 2015

2014
A test circuit based on a ring oscillator array for statistical characterization of Plasma-Induced Damage.
Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, 2014


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