Sasan Cyrusian

According to our database, Sasan Cyrusian authored at least 2 papers between 2005 and 2026.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2026

23.2 A 2-Channel 800Gb/s Transceiver for Coherent-Lite Applications with <300ns Latency in 5nm FinFET.

Marco Sosio, Claudio Nani, Enrico Monaco, Nicola Ghittori, Domenico Albano, Alessio Di Pasquo, Alessandro Bosi, Travis Lovitt, Gabriele Gira, Fulvio Martinelli, Victor Karam, Devrishi Khanna, Mehdi N. Khiarak, Sasan Cyrusian, Mehdi Davoodi, Marco Garampazzi, Nimesh N. Miral, Fabio Giunco, Ivan Fabiano, Nicola Codega, Claudio Asero, Leonardo Daniel Herbas Burgos, Enrico Temporiti, Shawn Scouten, Kishore Kota, Yang Fu, Ruibin Jin, Josef Mueller, Michael Leung, Arash Farhoodfar, Stephen Jantzi, Ken Chang

Proceedings of the IEEE International Solid-State Circuits Conference, 2026

2005

A 2.5GHz phase-switching PLL using a supply controlled 2-delay-stage 10GHz ring oscillator for improved jitter/mismatch.

Eva Tatschl-Unterberger, Sasan Cyrusian, Michael Ruegg

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005