Satoshi Koyama

According to our database, Satoshi Koyama authored at least 4 papers between 2010 and 2011.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2011

On-chip detection methodology for break-even time of power gated function units.

Kimiyoshi Usami, Yuya Goto, Kensaku Matsunaga, Satoshi Koyama, Daisuke Ikebuchi, Hideharu Amano, Hiroshi Nakamura

Proceedings of the 2011 International Symposium on Low Power Electronics and Design, 2011

Geyser-2: The second prototype CPU with fine-grained run-time power gating.

Lei Zhao, Daisuke Ikebuchi, Yoshiki Saito, M. Kamata, Naomi Seki, Yu Kojima, Hideharu Amano, Satoshi Koyama, Tatsunori Hashida, Y. Umahashi, D. Masuda, Kimiyoshi Usami, Keiji Kimura, Mitaro Namiki, Seidai Takeda, Hiroshi Nakamura, Masaaki Kondo

Proceedings of the 16th Asia South Pacific Design Automation Conference, 2011

2010

Adaptive power gating for function units in a microprocessor.

Kimiyoshi Usami, Tatsunori Hashida, Satoshi Koyama, Tatsuya Yamamoto, Daisuke Ikebuchi, Hideharu Amano, Mitaro Namiki, Masaaki Kondo, Hiroshi Nakamura

Proceedings of the 11th International Symposium on Quality of Electronic Design (ISQED 2010), 2010

Geyser-1: a MIPS R3000 CPU core with fine-grained run-time power gating.

Daisuke Ikebuchi, Naomi Seki, Yu Kojima, M. Kamata, Lei Zhao, Hideharu Amano, Toshiaki Shirai, Satoshi Koyama, Tatsunori Hashida, Y. Umahashi, Hiroki Masuda, Kimiyoshi Usami, Seidai Takeda, Hiroshi Nakamura, Mitaro Namiki, Masaaki Kondo

Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010