Daisuke Ikebuchi

According to our database, Daisuke Ikebuchi authored at least 13 papers between 2008 and 2011.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2011

Performance, Area, and Power Evaluations of Ultrafine-Grained Run-Time Power-Gating Routers for CMPs.

Hiroki Matsutani, Michihiro Koibuchi, Daisuke Ikebuchi, Kimiyoshi Usami, Hiroshi Nakamura, Hideharu Amano

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011

Cool Mega-Arrays: Ultralow-Power Reconfigurable Accelerator Chips.

Nobuaki Ozaki, Yoshihiro Yasuda, Mai Izawa, Yoshiki Saito, Daisuke Ikebuchi, Hideharu Amano, Hiroshi Nakamura, Kimiyoshi Usami, Mitaro Namiki, Masaaki Kondo

IEEE Micro, 2011

Design and Implementation Fine-grained Power Gating on Microprocessor Functional Units.

Zhao Lei, Daisuke Ikebuchi, Kimiyoshi Usami, Mitaro Namiki, Masaaki Kondo, Hiroshi Nakamura, Hideharu Amano

IPSJ Trans. Syst. LSI Des. Methodol., 2011

A Leakage Efficient Data TLB Design for Embedded Processors.

Lei Zhao, Hui Xu, Daisuke Ikebuchi, Tetsuya Sunata, Mitaro Namiki, Hideharu Amano

IEICE Trans. Inf. Syst., 2011

A Leakage Efficient Instruction TLB Design for Embedded Processors.

Zhao Lei, Hui Xu, Daisuke Ikebuchi, Tetsuya Sunata, Mitaro Namiki, Hideharu Amano

IEICE Trans. Inf. Syst., 2011

On-chip detection methodology for break-even time of power gated function units.

Kimiyoshi Usami, Yuya Goto, Kensaku Matsunaga, Satoshi Koyama, Daisuke Ikebuchi, Hideharu Amano, Hiroshi Nakamura

Proceedings of the 2011 International Symposium on Low Power Electronics and Design, 2011

Cool Mega-Array: A highly energy efficient reconfigurable accelerator.

Nobuaki Ozaki, Yoshihiro Yasuda, Yoshiki Saito, Daisuke Ikebuchi, Masayuki Kimura, Hideharu Amano, Hiroshi Nakamura, Kimiyoshi Usami, Mitaro Namiki, Masaaki Kondo

Proceedings of the 2011 International Conference on Field-Programmable Technology, 2011

Geyser-2: The second prototype CPU with fine-grained run-time power gating.

Lei Zhao, Daisuke Ikebuchi, Yoshiki Saito, M. Kamata, Naomi Seki, Yu Kojima, Hideharu Amano, Satoshi Koyama, Tatsunori Hashida, Y. Umahashi, D. Masuda, Kimiyoshi Usami, Keiji Kimura, Mitaro Namiki, Seidai Takeda, Hiroshi Nakamura, Masaaki Kondo

Proceedings of the 16th Asia South Pacific Design Automation Conference, 2011

2010

Ultra Fine-Grained Run-Time Power Gating of On-chip Routers for CMPs.

Hiroki Matsutani, Michihiro Koibuchi, Daisuke Ikebuchi, Kimiyoshi Usami, Hiroshi Nakamura, Hideharu Amano

Proceedings of the NOCS 2010, 2010

Adaptive power gating for function units in a microprocessor.

Kimiyoshi Usami, Tatsunori Hashida, Satoshi Koyama, Tatsuya Yamamoto, Daisuke Ikebuchi, Hideharu Amano, Mitaro Namiki, Masaaki Kondo, Hiroshi Nakamura

Proceedings of the 11th International Symposium on Quality of Electronic Design (ISQED 2010), 2010

Reducing instruction TLB's leakage power consumption for embedded processors.

Zhao Lei, Hui Xu, Daisuke Ikebuchi, Hideharu Amano, Tetsuya Sunata, Mitaro Namiki

Proceedings of the International Green Computing Conference 2010, 2010

Geyser-1: a MIPS R3000 CPU core with fine-grained run-time power gating.

Daisuke Ikebuchi, Naomi Seki, Yu Kojima, M. Kamata, Lei Zhao, Hideharu Amano, Toshiaki Shirai, Satoshi Koyama, Tatsunori Hashida, Y. Umahashi, Hiroki Masuda, Kimiyoshi Usami, Seidai Takeda, Hiroshi Nakamura, Mitaro Namiki, Masaaki Kondo

Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010

2008

A fine-grain dynamic sleep control scheme in MIPS R3000.

Naomi Seki, Lei Zhao, Jo Kei, Daisuke Ikebuchi, Yu Kojima, Yohei Hasegawa, Hideharu Amano, Toshihiro Kashima, Seidai Takeda, Toshiaki Shirai, Mitsutaka Nakata, Kimiyoshi Usami, Tetsuya Sunata, Jun Kanai, Mitaro Namiki, Masaaki Kondo, Hiroshi Nakamura

Proceedings of the 26th International Conference on Computer Design, 2008