Satwant Singh

Orcid: 0000-0001-8838-5723

According to our database1, Satwant Singh authored at least 8 papers between 1992 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
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Links

On csauthors.net:

Bibliography

2024
Introduction to the Special Issue on FPGA-based Embedded Systems for Industrial and IoT Applications.
ACM Trans. Reconfigurable Technol. Syst., December, 2024

2023
Active Impedance Network Buck-Boost Three-Level T-Type Inverter With Enhanced Voltage Gain.
IEEE Access, 2023

2022
Shape-based Evaluation of Epidemic Forecasts.
Proceedings of the IEEE International Conference on Big Data, 2022

2020
A New SVPWM Technique to Reduce the Inductor Current Ripple of Three-Phase Z-Source Inverter.
IEEE Trans. Ind. Electron., 2020

2019
TinBiNN: Tiny Binarized Neural Network Overlay in about 5, 000 4-LUTs and 5mW.
CoRR, 2019

1993
A VLSI Implementation of a Cascade Viterbi Decoder with Traceback.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993

1992
The effect of logic block architecture on FPGA performance.
IEEE J. Solid State Circuits, March, 1992

ORCA: A New Architecture for High-Performance FPLs.
Proceedings of the Field-Programmable Gate Arrays: Architectures and Tools for Rapid Prototyping, Second International Workshop on Field-Programmable Logic and Applications, Vienna, Austria, August 31, 1992


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