Seiichi Umai

According to our database1, Seiichi Umai authored at least 3 papers between 2011 and 2016.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2016
3.3 A 25Gb/s multistandard serial link transceiver for 50dB-loss copper cable in 28nm CMOS.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

2015
3.2 multi-standard 185fsrms 0.3-to-28Gb/s 40dB backplane signal conditioner with adaptive pattern-match 36-Tap DFE and data-rate-adjustment PLL in 28nm CMOS.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

2011
A 10: 4 MUX and 4: 10 DEMUX Gearbox LSI for 100-Gigabit Ethernet Link.
IEEE J. Solid State Circuits, 2011


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