Shiou-Ching Chen

According to our database, Shiou-Ching Chen authored at least 1 paper in 2014.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2014

A 3 MHz-to-1.8 GHz 94 μW-to-9.5 mW 0.0153-mm² all-digital delay-locked loop in 65-nm CMOS.

Chun-Yuan Cheng, Jinn-Shyan Wang, Pei-Yuan Chou, Shiou-Ching Chen, Chi-Tien Sun, Yuan-Hua Chu, Tzu-Yi Yang

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2014