According to our database1, Sho Ikeda authored at least 12 papers between 2011 and 2017.
Legend:Book In proceedings Article PhD thesis Other
A - 244-dB FOM High-Frequency Piezoelectric Resonator-Based Cascaded Fractional-N PLL With Sub-ppb-Order Channel-Adjusting Technique.
IEEE J. Solid State Circuits, 2017
Design of high-frequency piezoelectric resonator-based cascaded fractional-N PLL with sub-ppb-order channel adjusting technique.
Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017
An 8.865-GHz -244dB-FOM high-frequency piezoelectric resonator-based cascaded fractional-N PLL with sub-ppb-order channel adjusting technique.
Proceedings of the 2016 IEEE Symposium on VLSI Circuits, 2016
A 0.5-V 1.56-mW 5.5-GHz RF transceiver IC module with J-shaped folded monopole antenna.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
A 0.5-V 5.8-GHz low-power asymmetrical QPSK/OOK transceiver for wireless sensor network.
Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015
A Sub-1mW Class-C-VCO-Based Low Voltage PLL with Ultra-Low-Power Digitally-Calibrated ILFD in 65nm CMOS.
IEICE Trans. Electron., 2014
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2014
A 950μW 5.5-GHz low voltage PLL with digitally-calibrated ILFD and linearized varactor.
Proceedings of the 19th Asia and South Pacific Design Automation Conference, 2014
Performance Improvement of Physically Based Spectral Rendering Using Stochastic Sampling.
Proceedings of the Computational Color Imaging - 4th International Workshop, 2013
A Ring-VCO-Based Injection-Locked Frequency Multiplier with Novel Pulse Generation Technique in 65 nm CMOS.
IEICE Trans. Electron., 2012
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2012
A ring-VCO-based injection-locked frequency multiplier using a new pulse generation technique in 65 nm CMOS.
Proceedings of the International SoC Design Conference, 2011