Shoji Kubono

According to our database, Shoji Kubono authored at least 3 papers between 1991 and 2001.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2001

A 126.6-mm² AND-type 512-Mb flash memory with 1.8-V power supply.

Tatsuya Ishii, Kazuyoshi Oshima, Hiroshi Sato, Satoshi Noda, Jiro Kishimoto, Hiroaki Kotani, Atsushi Nozoe, Kazunori Furusawa, Takayuki Yoshitake, Masataka Kato, Masahito Takahashi, Akihiko Sato, Shoji Kubono, Kiichi Manita, Kenji Koda, Takeshi Nakayama, Akira Hosogane

IEEE J. Solid State Circuits, 2001

1999

A 256-Mb multilevel flash memory with 2-MB/s program rate for mass storage applications.

Atsushi Nozoe, Hiroaki Kotani, Tetsuya Tsujikawa, Keiichi Yoshida, Kazunori Furusawa, Masataka Kato, Toshiaki Nishimoto, Hitoshi Kume, Hideaki Kurata, Naoki Miyamoto, Shoji Kubono, Michitaro Kanamitsu, Kenji Koda, Takeshi Nakayama, Yasuhiro Kouro, Akira Hosogane, Natsuo Ajika, Kiyoteru Kobayashi

IEEE J. Solid State Circuits, 1999

1991

A 4-Mb pseudo SRAM operating at 2.6+or-1 V with 3- mu A data retention current.

Katsuyuki Sato, Kanehide Kenmizaki, Shoji Kubono, Toshio Mochizuki, Hidetomo Aoyagi, Michitaro Kanamitsu, Soichi Kunito, Hiroyuki Uchida, Yoshihiko Yasu, Atsushi Ogishima, Sho Sano, Hiroshi Kawamoto

IEEE J. Solid State Circuits, November, 1991