Shuanglong Liu

Orcid: 0000-0002-1513-1981

According to our database1, Shuanglong Liu authored at least 32 papers between 2012 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2023
High-Performance Acceleration of 2-D and 3-D CNNs on FPGAs Using Static Block Floating Point.
IEEE Trans. Neural Networks Learn. Syst., August, 2023

2022
Toward Full-Stack Acceleration of Deep Convolutional Neural Networks on FPGAs.
IEEE Trans. Neural Networks Learn. Syst., 2022

FPGA-Based Acceleration for Bayesian Convolutional Neural Networks.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

Algorithm and Hardware Co-design for Reconfigurable CNN Accelerator.
Proceedings of the 27th Asia and South Pacific Design Automation Conference, 2022

2021
Reconfigurable Acceleration of Short Read Mapping with Biological Consideration.
Proceedings of the FPGA '21: The 2021 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, Virtual Event, USA, February 28, 2021

Accelerating Fully Spectral CNNs with Adaptive Activation Functions on FPGA.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

2020
Acceleration of Short Read Alignment with Runtime Reconfiguration.
Proceedings of the International Conference on Field-Programmable Technology, 2020

Optimizing Fully Spectral Convolutional Neural Networks on FPGA.
Proceedings of the International Conference on Field-Programmable Technology, 2020

Optimizing FPGA-Based CNN Accelerator Using Differentiable Neural Architecture Search.
Proceedings of the 38th IEEE International Conference on Computer Design, 2020

2019
Optimizing CNN-based Hyperspectral ImageClassification on FPGAs.
CoRR, 2019

Towards an Efficient Accelerator for DNN-Based Remote Sensing Image Segmentation on FPGAs.
Proceedings of the 29th International Conference on Field Programmable Logic and Applications, 2019

Towards Efficient Deep Neural Network Training by FPGA-Based Batch-Level Parallelism.
Proceedings of the 27th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2019

Efficient Weight Reuse for Large LSTMs.
Proceedings of the 30th IEEE International Conference on Application-specific Systems, 2019

F-E3D: FPGA-based Acceleration of an Efficient 3D Convolutional Neural Network for Human Action Recognition.
Proceedings of the 30th IEEE International Conference on Application-specific Systems, 2019

Optimizing CNN-Based Hyperspectral Image Classification on FPGAs.
Proceedings of the Applied Reconfigurable Computing - 15th International Symposium, 2019

2018
Optimizing CNN-based Segmentation with Deeply Customized Convolutional and Deconvolutional Architectures on FPGA.
ACM Trans. Reconfigurable Technol. Syst., 2018

Memory-Efficient Architecture for Accelerating Generative Networks on FPGA.
Proceedings of the International Conference on Field-Programmable Technology, 2018

A Real-Time Object Detection Accelerator with Compressed SSDLite on FPGA.
Proceedings of the International Conference on Field-Programmable Technology, 2018

Reconfigurable Acceleration of 3D-CNNs for Human Action Recognition with Block Floating-Point Representation.
Proceedings of the 28th International Conference on Field Programmable Logic and Applications, 2018

ADAM: Automated Design Analysis and Merging for Speeding up FPGA Development.
Proceedings of the 2018 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2018

A Low-Power Deconvolutional Accelerator for Convolutional Neural Network Based Segmentation on FPGA: Abstract Only.
Proceedings of the 2018 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2018

Hardware Compilation of Deep Neural Networks: An Overview.
Proceedings of the 29th IEEE International Conference on Application-specific Systems, 2018

2017
Acceleration of MCMC-based algorithms using reconfigurable logic.
PhD thesis, 2017

An Unbiased MCMC FPGA-Based Accelerator in the Land of Custom Precision Arithmetic.
IEEE Trans. Computers, 2017

CNN-LSTM Neural Network Model for Quantitative Strategy Analysis in Stock Markets.
Proceedings of the Neural Information Processing - 24th International Conference, 2017

Reconfigurable acceleration of genetic sequence alignment: A survey of two decades of efforts.
Proceedings of the 27th International Conference on Field Programmable Logic and Applications, 2017

Communication-Aware MCMC Method for Big Data Applications on FPGAs.
Proceedings of the 25th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2017

2016
Stock Price Prediction Through the Mixture of Gaussian Processes via the Precise Hard-cut EM Algorithm.
Proceedings of the Intelligent Computing Methodologies - 12th International Conference, 2016

Stacked Auto-Encoders for Feature Extraction with Neural Networks.
Proceedings of the Bio-inspired Computing - Theories and Applications, 2016

2015
An exact MCMC accelerator under custom precision regimes.
Proceedings of the 2015 International Conference on Field Programmable Technology, 2015

2014
Parallel resampling for particle filters on FPGAs.
Proceedings of the 2014 International Conference on Field-Programmable Technology, 2014

2012
Self-map building in wireless sensor network based on TDOA measurements.
Proceedings of the IEEE International Conference on Multisensor Fusion and Integration for Intelligent Systems, 2012


  Loading...