Xinyu Niu

According to our database1, Xinyu Niu authored at least 51 papers between 2011 and 2019.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2019
Deep Neural Network Approximation for Custom Hardware: Where We've Been, Where We're Going.
ACM Comput. Surv., 2019

Efficient Weight Reuse for Large LSTMs.
Proceedings of the 30th IEEE International Conference on Application-specific Systems, 2019

F-E3D: FPGA-based Acceleration of an Efficient 3D Convolutional Neural Network for Human Action Recognition.
Proceedings of the 30th IEEE International Conference on Application-specific Systems, 2019

2018
Optimizing CNN-based Segmentation with Deeply Customized Convolutional and Deconvolutional Architectures on FPGA.
TRETS, 2018

Correlation Coefficient Based Cluster Data Preprocessing and LSTM Prediction Model for Time Series Data in Large Aircraft Test Flights.
Proceedings of the Smart Computing and Communication - Third International Conference, 2018

Reconfigurable Hardware Generation for Tensor Flow Models of CNN Algorithms on a Heterogeneous Acceleration Platform.
Proceedings of the Smart Computing and Communication - Third International Conference, 2018

Custom machine learning architectures: towards realtime anomaly detection for flight testing.
Proceedings of the 2018 IEEE International Parallel and Distributed Processing Symposium Workshops, 2018

Memory-Efficient Architecture for Accelerating Generative Networks on FPGA.
Proceedings of the International Conference on Field-Programmable Technology, 2018

A Real-Time Object Detection Accelerator with Compressed SSDLite on FPGA.
Proceedings of the International Conference on Field-Programmable Technology, 2018

Towards Efficient Convolutional Neural Network for Domain-Specific Applications on FPGA.
Proceedings of the 28th International Conference on Field Programmable Logic and Applications, 2018

Reconfigurable Acceleration of 3D-CNNs for Human Action Recognition with Block Floating-Point Representation.
Proceedings of the 28th International Conference on Field Programmable Logic and Applications, 2018

Automatic Optimising CNN with Depthwise Separable Convolution on FPGA: (Abstact Only).
Proceedings of the 2018 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2018

A Low-Power Deconvolutional Accelerator for Convolutional Neural Network Based Segmentation on FPGA: Abstract Only.
Proceedings of the 2018 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2018

Hardware Compilation of Deep Neural Networks: An Overview.
Proceedings of the 29th IEEE International Conference on Application-specific Systems, 2018

2017
Exploiting the chaotic behaviour of atmospheric models with reconfigurable architectures.
Computer Physics Communications, 2017

Hardware Acceleration for Machine Learning.
Proceedings of the 2017 IEEE Computer Society Annual Symposium on VLSI, 2017

F-C3D: FPGA-based 3-dimensional convolutional neural network.
Proceedings of the 27th International Conference on Field Programmable Logic and Applications, 2017

DeepPump: Multi-pumping deep Neural Networks.
Proceedings of the 28th IEEE International Conference on Application-specific Systems, 2017

Optimizing CNN-Based Object Detection Algorithms on Embedded FPGA Platforms.
Proceedings of the Applied Reconfigurable Computing - 13th International Symposium, 2017

dfesnippets: An Open-Source Library for Dataflow Acceleration on FPGAs.
Proceedings of the Applied Reconfigurable Computing - 13th International Symposium, 2017

Custom Framework for Run-Time Trading Strategies.
Proceedings of the Applied Reconfigurable Computing - 13th International Symposium, 2017

2016
Self-adaptive Hardware Acceleration on a Heterogeneous Cluster.
Proceedings of the Self-aware Computing Systems - An Engineering Approach, 2016

EXTRA: Towards the exploitation of eXascale technology for reconfigurable architectures.
Proceedings of the 11th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2016

Connect on the fly: Enhancing and prototyping of cycle-reconfigurable modules.
Proceedings of the 26th International Conference on Field Programmable Logic and Applications, 2016

EURECA compilation: Automatic optimisation of cycle-reconfigurable circuits.
Proceedings of the 26th International Conference on Field Programmable Logic and Applications, 2016

A Scalable Dataflow Accelerator for Real Time Onboard Hyperspectral Image Classification.
Proceedings of the Applied Reconfigurable Computing - 12th International Symposium, 2016

2015
Optimising runtime reconfigurable designs for high performance applications.
PhD thesis, 2015

Power-Adaptive Computing System Design for Solar-Energy-Powered Embedded Systems.
IEEE Trans. VLSI Syst., 2015

Automating Elimination of Idle Functions by Runtime Reconfiguration.
TRETS, 2015

Mapping Adaptive Particle Filters to Heterogeneous Reconfigurable Systems.
TRETS, 2015

FASTER: Facilitating Analysis and Synthesis Technologies for Effective Reconfiguration.
Microprocessors and Microsystems - Embedded Hardware Design, 2015

Accelerated cell imaging and classification on FPGAs for quantitative-phase asymmetric-detection time-stretch optical microscopy.
Proceedings of the 2015 International Conference on Field Programmable Technology, 2015

Lower precision for higher accuracy: Precision and resolution exploration for shallow water equations.
Proceedings of the 2015 International Conference on Field Programmable Technology, 2015

EURECA: On-Chip Configuration Generation for Effective Dynamic Data Access.
Proceedings of the 2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2015

Architectures and Precision Analysis for Modelling Atmospheric Variables with Chaotic Behaviour.
Proceedings of the 23rd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2015

EXTRA: Towards an Efficient Open Platform for Reconfigurable High Performance Computing.
Proceedings of the 18th IEEE International Conference on Computational Science and Engineering, 2015

2014
A Self-Aware Tuning and Self-Aware Evaluation Method for Finite-Difference Applications in Reconfigurable Systems.
TRETS, 2014

Elastic Management of Reconfigurable Accelerators.
Proceedings of the IEEE International Symposium on Parallel and Distributed Processing with Applications, 2014

A dataflow system for anomaly detection and analysis.
Proceedings of the 2014 International Conference on Field-Programmable Technology, 2014

2013
A framework for effective exploitation of partial reconfiguration in dataflow computing.
Proceedings of the 2013 8th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC), 2013

Dynamic Stencil: Effective exploitation of run-time resources in reconfigurable clusters.
Proceedings of the 2013 International Conference on Field-Programmable Technology, 2013

A scalable design approach for stencil computation on reconfigurable clusters.
Proceedings of the 23rd International Conference on Field programmable Logic and Applications, 2013

Automating resource optimisation in reconfigurable design (abstract only).
Proceedings of the 2013 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2013

Automating Elimination of Idle Functions by Run-Time Reconfiguration.
Proceedings of the 21st IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2013

Aspect driven compilation for dataflow designs.
Proceedings of the 24th International Conference on Application-Specific Systems, 2013

Heterogeneous Reconfigurable System for Adaptive Particle Filters in Real-Time Applications.
Proceedings of the Reconfigurable Computing: Architectures, Tools and Applications, 2013

2012
Session types: towards safe and fast reconfigurable programming.
SIGARCH Computer Architecture News, 2012

Self-Adaptive Heterogeneous Cluster with Wireless Network.
Proceedings of the 26th IEEE International Parallel and Distributed Processing Symposium Workshops & PhD Forum, 2012

Exploiting run-time reconfiguration in stencil computation.
Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL), 2012

Novel Design Methods and a Tool Flow for Unleashing Dynamic Reconfiguration.
Proceedings of the 15th IEEE International Conference on Computational Science and Engineering, 2012

2011
Reconfiguring Distributed Applications in FPGA Accelerated Cluster with Wireless Networking.
Proceedings of the International Conference on Field Programmable Logic and Applications, 2011


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