Shubham Sahay

According to our database, Shubham Sahay authored at least 15 papers between 2017 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

Satisfiability Attack-Resilient Camouflaged Multiple Multivariable Logic-in-Memory Exploiting 3D NAND Flash Array.

Bhogi Satya Swaroop, Ayush Saxena, Shubham Sahay

IEEE Trans. Circuits Syst. I Regul. Pap., February, 2024

2023

A Computationally Efficient Compact Model for Ferroelectric Switching With Asymmetric Nonperiodic Input Signals.

Amol D. Gaidhane, Raghvendra Dangi, Shubham Sahay, Amit Verma, Yogesh Singh Chauhan

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., May, 2023

An Automatic Leakage Compensation Technique for Capacitively Coupled Class-AB Operational Amplifiers.

Abhishek Kumar, Shubham Sahay, Imon Mondal

Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

2022

Muller C-Element Exploiting Programmable Metallization Cell for Bayesian Inference.

Jasmine Kaur, Sneh Saurabh, Shubham Sahay

IEEE J. Emerg. Sel. Topics Circuits Syst., 2022

Analytical Modeling of 3D NAND Flash Cell With a Gaussian Doping Profile.

Amit Kumar, Raushan Kumar, Shubham Sahay

IEEE Access, 2022

2021

3D-aCortex: an ultra-compact energy-efficient neurocomputing platform based on commercial 3D-NAND flash memories.

Mohammad Bavandpour, Shubham Sahay, Mohammad Reza Mahmoodi, Dmitri B. Strukov

Neuromorph. Comput. Eng., 2021

Energy-Efficient Implementation of Generative Adversarial Networks on Passive RRAM Crossbar Arrays.

Siddharth Satyam, Honey Nikam, Shubham Sahay

CoRR, 2021

Long Short-Term Memory Implementation Exploiting Passive RRAM Crossbar Array.

Honey Nikam, Siddharth Satyam, Shubham Sahay

CoRR, 2021

A Flash-Based Multi-Bit Content-Addressable Memory with Euclidean Squared Distance.

Arman Kazemi, Shubham Sahay, Ayush Saxena, Mohammad Mehdi Sharifi, Michael T. Niemier, X. Sharon Hu

Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2021

2020

Efficient Mixed-Signal Neurocomputing Via Successive Integration and Rescaling.

Mohammad Bavandpour, Shubham Sahay, Mohammad Reza Mahmoodi, Dmitri B. Strukov

IEEE Trans. Very Large Scale Integr. Syst., 2020

Mixed-Signal Vector-by-Matrix Multiplier Circuits Based on 3D-NAND Memories for Neurocomputing.

Mohammad Bavandpour, Shubham Sahay, Mohammad Reza Mahmoodi, Dmitri B. Strukov

Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

2019

Time-Domain Mixed-Signal Vector-by-Matrix Multiplier Exploiting 1T-1R Array.

Shubham Sahay, Mohammad Bavandpour, Mohammad Reza Mahmoodi, Dmitri B. Strukov

CoRR, 2019

2018

A Behavioral Compact Model of 3D NAND Flash Memory.

Shubham Sahay, Dmitri B. Strukov

CoRR, 2018

Switching-Time Dependent PUF Using STT-MRAM.

Ashwani Kumar, Shubham Sahay, Manan Suri

Proceedings of the 31st International Conference on VLSI Design and 17th International Conference on Embedded Systems, 2018

2017

Comprehensive Analysis of Gate-Induced Drain Leakage in Emerging FET Architectures: Nanotube FETs Versus Nanowire FETs.

Shubham Sahay, Mamidala Jagadesh Kumar

IEEE Access, 2017