Arman Kazemi

Orcid: 0000-0002-2009-5516

According to our database1, Arman Kazemi authored at least 17 papers between 2018 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2024
Super Efficient Neural Network for Compression Artifacts Reduction and Super Resolution.
CoRR, 2024

2023
A Reconfigurable FeFET Content Addressable Memory for Multi-State Hamming Distance.
IEEE Trans. Circuits Syst. I Regul. Pap., 2023

2022
FeFET Multi-Bit Content-Addressable Memories for In-Memory Nearest Neighbor Search.
IEEE Trans. Computers, 2022

Experimentally realized memristive memory augmented neural network.
CoRR, 2022

COSIME: FeFET Based Associative Memory for In-Memory Cosine Similarity Search.
Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022

Associative Memory Based Experience Replay for Deep Reinforcement Learning.
Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022

Eva-CAM: A Circuit/Architecture-Level Evaluation Tool for General Content Addressable Memories.
Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022

2021
Application-driven Design Exploration for Dense Ferroelectric Embedded Non-volatile Memories.
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2021

MIMHD: Accurate and Efficient Hyperdimensional Inference Using Multi-Bit In-Memory Computing.
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2021

A Flash-Based Multi-Bit Content-Addressable Memory with Euclidean Squared Distance.
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2021

ICCAD Tutorial Session Paper Ferroelectric FET Technology and Applications: From Devices to Systems.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021

In-Memory Computing based Accelerator for Transformer Networks for Long Sequences.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

In-Memory Nearest Neighbor Search with FeFET Multi-Bit Content-Addressable Memories.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

2020
Performance Analysis of Semi-supervised Learning in the Small-data Regime using VAEs.
CoRR, 2020

A Hybrid FeMFET-CMOS Analog Synapse Circuit for Neural Network Training and Inference.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

A Device Non-Ideality Resilient Approach for Mapping Neural Networks to Crossbar Arrays.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

2018
An Energy-Efficient Quaternary Serial Adder for Nanoelectronics.
Proceedings of the 48th IEEE International Symposium on Multiple-Valued Logic, 2018


  Loading...