Shuping Zhang

Orcid: 0000-0001-9819-1981

According to our database1, Shuping Zhang authored at least 19 papers between 2014 and 2022.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2022
Learning to detect soft shadow from limited data.
Vis. Comput., 2022

Mapping coastal upwelling in the Baltic Sea from 2002 to 2020 using remote sensing data.
Int. J. Appl. Earth Obs. Geoinformation, 2022

2021
Remote Sensing Supported Sea Surface pCO2 Estimation and Variable Analysis in the Baltic Sea.
Remote. Sens., 2021

Health Informatics Study of Related Complications Relating to Upper Arm Implantable Intravenous Infusion Port in Breast Cancer Patients.
J. Medical Imaging Health Informatics, 2021

Shadow removal via dual module network and low error shadow dataset.
Comput. Graph., 2021

2020
Surface measurement, intracardiac electrocardiogram and tracheal bifurcation techniques for locating the catheter tips of totally implantable venous access port.
Comput. Methods Programs Biomed., 2020

2018
A Variable-Clock-Cycle-Path VLSI Design of Binary Arithmetic Decoder for H.265/HEVC.
IEEE Trans. Circuits Syst. Video Technol., 2018

Towards Ultrasound Everywhere: A Portable 3D Digital Back-End Capable of Zone and Compound Imaging.
IEEE Trans. Biomed. Circuits Syst., 2018

Emotional Tendency Dictionary Construction for College Teaching Evaluation.
Int. J. Emerg. Technol. Learn., 2018

Effective water surface mapping in macrophyte-covered reservoirs in NE Brazil based on TerraSAR-X time series.
Int. J. Appl. Earth Obs. Geoinformation, 2018

Impedance Based MEMS Biosensor for Detection of Foodborne Pathogen.
Proceedings of the 13th IEEE Annual International Conference on Nano/Micro Engineered and Molecular Systems, 2018

2017
A Dual-Clock VLSI Design of H.265 Sample Adaptive Offset Estimation for 8k Ultra-HD TV Encoding.
IEEE Trans. Very Large Scale Integr. Syst., 2017

An 8K H.265/HEVC Video Decoder Chip With a New System Pipeline Design.
IEEE J. Solid State Circuits, 2017

A 7-Die 3D Stacked 3840×2160@120 fps Motion Estimation Processor.
IEICE Trans. Electron., 2017

2016
A Low-Power VLSI Architecture for HEVC De-Quantization and Inverse Transform.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2016

14.7 A 4Gpixel/s 8/10b H.265/HEVC video decoder chip for 8K Ultra HD applications.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

Parallel Implementation of the Range-Doppler Radar Processing on a GPU Architecture.
Proceedings of the 15th International Symposium on Parallel and Distributed Computing, 2016

2015
Low-Power Motion Estimation Processor with 3D Stacked Memory.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2015

2014
A low power 720p motion estimation processor with 3D stacked memory.
Proceedings of the 22nd International Conference on Very Large Scale Integration, 2014


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