Somayeh Sardashti

According to our database1, Somayeh Sardashti authored at least 11 papers between 2004 and 2018.

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Bibliography

2018
F1 Query: Declarative Querying at Scale.
PVLDB, 2018

2017
Could Compression Be of General Use? Evaluating Memory Compression across Domains.
TACO, 2017

2016
Yet Another Compressed Cache: A Low-Cost Yet Effective Compressed Cache.
TACO, 2016

2015
A Primer on Compression in the Memory Hierarchy
Synthesis Lectures on Computer Architecture, Morgan & Claypool Publishers, 2015

2014
Decoupled Compressed Cache: Exploiting Spatial Locality for Energy Optimization.
IEEE Micro, 2014

Skewed Compressed Caches.
Proceedings of the 47th Annual IEEE/ACM International Symposium on Microarchitecture, 2014

2013
Decoupled compressed cache: exploiting spatial locality for energy-optimized compressed caching.
Proceedings of the 46th Annual IEEE/ACM International Symposium on Microarchitecture, 2013

2012
UniFI: leveraging non-volatile memories for a unified fault tolerance and idle power management technique.
Proceedings of the International Conference on Supercomputing, 2012

2011
The gem5 simulator.
SIGARCH Computer Architecture News, 2011

2006
Muli-Issue Multi-Threaded Stream Processor.
Proceedings of the 2006 IEEE International Conference on Multimedia and Expo, 2006

2004
Thread-Sensitive Instruction Issue for SMT Processors.
Computer Architecture Letters, 2004


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