Bradford M. Beckmann

According to our database1, Bradford M. Beckmann authored at least 30 papers between 2003 and 2019.

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Bibliography

2019
Optimizing GPU Cache Policies for MI Workloads.
CoRR, 2019

Killi: Runtime Fault Classification to Deploy Low Voltage Caches without MBIST.
Proceedings of the 25th IEEE International Symposium on High Performance Computer Architecture, 2019

Adaptive Task Aggregation for High-Performance Sparse Solvers on GPUs.
Proceedings of the 28th International Conference on Parallel Architectures and Compilation Techniques, 2019

2018
Oversubscribed Command Queues in GPUs.
Proceedings of the 11th Workshop on General Purpose Processing using GPUs, 2018

Lost in Abstraction: Pitfalls of Analyzing GPUs at the Intermediate Language Level.
Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2018

Case Study of Process Variation-Based Domain Partitioning of GPGPUs.
Proceedings of the 24th IEEE International Symposium on Asynchronous Circuits and Systems, 2018

2017
Programming GPGPU Graph Applications with Linear Algebra Building Blocks.
International Journal of Parallel Programming, 2017

Gravel: fine-grain GPU-initiated network messages.
Proceedings of the International Conference for High Performance Computing, 2017


2016
Implementing directed acyclic graphs with the heterogeneous system architecture.
Proceedings of the 9th Annual Workshop on General Purpose Processing using Graphics Processing Unit, 2016

Lazy release consistency for GPUs.
Proceedings of the 49th Annual IEEE/ACM International Symposium on Microarchitecture, 2016

Software Assisted Hardware Cache Coherence for Heterogeneous Processors.
Proceedings of the Second International Symposium on Memory Systems, 2016

2015
Achieving Exascale Capabilities through Heterogeneous Computing.
IEEE Micro, 2015

Adaptive GPU cache bypassing.
Proceedings of the 8th Workshop on General Purpose Processing using GPUs, 2015

Remote-scope promotion: clarified, rectified, and verified.
Proceedings of the 2015 ACM SIGPLAN International Conference on Object-Oriented Programming, 2015

Graph Coloring on the GPU and Some Techniques to Improve Load Imbalance.
Proceedings of the 2015 IEEE International Parallel and Distributed Processing Symposium Workshop, 2015

Synchronization Using Remote-Scope Promotion.
Proceedings of the Twentieth International Conference on Architectural Support for Programming Languages and Operating Systems, 2015

2014
iCHAT: Inter-cache Hardware-Assistant Data Transfer for Heterogeneous Chip Multiprocessors.
Proceedings of the 9th IEEE International Conference on Networking, 2014

Fine-grain task aggregation and coordination on GPUs.
Proceedings of the ACM/IEEE 41st International Symposium on Computer Architecture, 2014

BelRed: Constructing GPGPU graph applications with software building blocks.
Proceedings of the IEEE High Performance Extreme Computing Conference, 2014

QuickRelease: A throughput-oriented approach to release consistency on GPUs.
Proceedings of the 20th IEEE International Symposium on High Performance Computer Architecture, 2014

Heterogeneous-race-free memory models.
Proceedings of the Architectural Support for Programming Languages and Operating Systems, 2014

2013
Heterogeneous system coherence for integrated CPU-GPU systems.
Proceedings of the 46th Annual IEEE/ACM International Symposium on Microarchitecture, 2013

Pannotia: Understanding irregular GPGPU graph applications.
Proceedings of the IEEE International Symposium on Workload Characterization, 2013

2011
The gem5 simulator.
SIGARCH Computer Architecture News, 2011

Towards the ideal on-chip fabric for 1-to-many and many-to-1 communication.
Proceedings of the 44rd Annual IEEE/ACM International Symposium on Microarchitecture, 2011

2006
ASR: Adaptive Selective Replication for CMP Caches.
Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-39 2006), 2006

2005
Multifacet's general execution-driven multiprocessor simulator (GEMS) toolset.
SIGARCH Computer Architecture News, 2005

2004
Managing Wire Delay in Large Chip-Multiprocessor Caches.
Proceedings of the 37th Annual International Symposium on Microarchitecture (MICRO-37 2004), 2004

2003
TLC: Transmission Line Caches.
Proceedings of the 36th Annual International Symposium on Microarchitecture, 2003


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