According to our database1, Joel Hestness authored at least 13 papers between 2009 and 2019.
Legend:Book In proceedings Article PhD thesis Other
A survey of 25 years of evaluation.
Natural Language Engineering, 2019
Beyond human-level accuracy: computational challenges in deep learning.
Proceedings of the 24th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, 2019
Compositional Generalization for Primitive Substitutions.
Proceedings of the 2019 Conference on Empirical Methods in Natural Language Processing and the 9th International Joint Conference on Natural Language Processing, 2019
Deep Learning Scaling is Predictable, Empirically.
Convolutional Recurrent Neural Networks for Small-Footprint Keyword Spotting.
Proceedings of the Interspeech 2017, 2017
gem5-gpu: A Heterogeneous CPU-GPU Simulator.
Computer Architecture Letters, 2015
GPU Computing Pipeline Inefficiencies and Optimization Opportunities in Heterogeneous CPU-GPU Processors.
Proceedings of the 2015 IEEE International Symposium on Workload Characterization, 2015
A comparative analysis of microarchitecture effects on CPU and GPU memory system behavior.
Proceedings of the 2014 IEEE International Symposium on Workload Characterization, 2014
A QoS-Enabled On-Die Interconnect Fabric for Kilo-Node Chips.
IEEE Micro, 2012
The gem5 simulator.
SIGARCH Computer Architecture News, 2011
Kilo-NOC: a heterogeneous network-on-chip architecture for scalability and service guarantees.
Proceedings of the 38th International Symposium on Computer Architecture (ISCA 2011), 2011
Netrace: dependency-driven trace-based network-on-chip simulation.
Proceedings of the Third International Workshop on Network on Chip Architectures, 2010
Express Cube Topologies for on-Chip Interconnects.
Proceedings of the 15th International Conference on High-Performance Computer Architecture (HPCA-15 2009), 2009