Songyun Qu

Orcid: 0000-0001-9636-6792

According to our database1, Songyun Qu authored at least 9 papers between 2020 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
CIM-MLC: A Multi-level Compilation Stack for Computing-In-Memory Accelerators.
CoRR, 2024

2023
A Coordinated Model Pruning and Mapping Framework for RRAM-Based DNN Accelerators.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., July, 2023

ENASA: Towards Edge Neural Architecture Search based on CIM acceleration.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

2022
An Automated Quantization Framework for High-Utilization RRAM-Based PIM.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

CAP: Communication-Aware Automated Parallelization for Deep Learning Inference on CMP Architectures.
IEEE Trans. Computers, 2022

Processing-in-SRAM acceleration for ultra-low power visual 3D perception.
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

InfoX: an energy-efficient ReRAM accelerator design with information-lossless low-bit ADCs.
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

2021
ASBP: Automatic Structured Bit-Pruning for RRAM-based NN Accelerator.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

2020
RaQu: An automatic high-utilization CNN quantization and mapping framework for general-purpose RRAM Accelerator.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020


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