Steven G. Duvall

According to our database1, Steven G. Duvall authored at least 8 papers between 1987 and 2009.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2009
An optimization strategy for low energy and high performance for the on-chip interconnect signalling.
Proceedings of the 2009 International Symposium on Low Power Electronics and Design, 2009

Analysis and Design of Memoryless Interconnect Encoding Scheme.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

2005
Measurements and modeling of intrinsic fluctuations in MOSFET threshold voltage.
Proceedings of the 2005 International Symposium on Low Power Electronics and Design, 2005

2002
Impact of die-to-die and within-die parameter fluctuations on the maximum clock frequency distribution for gigascale integration.
IEEE J. Solid State Circuits, 2002

1995
A practical methodology for the statistical design of complex logic products for performance.
IEEE Trans. Very Large Scale Integr. Syst., 1995

1993
Practical Statistical Design of Complex Integrated Circuit Products.
Proceedings of the 30th Design Automation Conference. Dallas, 1993

1988
An interchange format for process and device simulation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1988

1987
EASE - An Application-Based CAD System for Process Design.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1987


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