Subhasis Bhattacharjee

Orcid: 0000-0002-3015-3388

According to our database1, Subhasis Bhattacharjee authored at least 18 papers between 2004 and 2023.

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Bibliography

2023
An Integrated Approach to Point Labeling Problem.
Proceedings of the 14th International Conference on Computing Communication and Networking Technologies, 2023

2022
A Distributed Algorithm for Constructing an Independent Dominating Set.
Proceedings of the Distributed Computing and Intelligent Technology, 2022

2019
A Fast Parallel Genetic Algorithm Based Approach for Community Detection in Large Networks.
Proceedings of the 11th International Conference on Communication Systems & Networks, 2019

2015
Certificate-based encoding of gate level description for secure transmission.
Int. J. Electron. Secur. Digit. Forensics, 2015

2014
Energy Efficient Lifetime Reliability-Aware Checkpointing for Real-Time System.
J. Low Power Electron., 2014

2013
Distributed Algorithm for Dynamic Data-Gathering in Sensor Network.
CoRR, 2013

Lifetime Reliability-Aware Checkpointing Mechanism: Modelling and Analysis.
Proceedings of the 2013 International Symposium on Electronic System Design, 2013

A fast and Effective DFT for test and diagnosis of power switches in SoCs.
Proceedings of the Design, Automation and Test in Europe, 2013

2009
FPGA placement using space-filling curves: Theory meets practice.
ACM Trans. Embed. Comput. Syst., 2009

A new fast heuristic for labeling points.
Inf. Process. Lett., 2009

2007
Distributed Data Gathering Scheduling in Multihop Wireless Sensor Networks for Improved Lifetime.
Proceedings of the 2007 International Conference on Computing: Theory and Applications (ICCTA 2007), 2007

2006
Test Pattern Generation for Power Supply Droop Faults.
Proceedings of the 19th International Conference on VLSI Design (VLSI Design 2006), 2006

Distributed Node-Based Transmission Power Control for Wireless Ad Hoc Networks.
Proceedings of the Distributed Computing and Internet Technology, 2006

2005
Distributed Time Slot Assignment in Wireless Ad Hoc Networks for STDMA.
Proceedings of the Distributed Computing and Internet Technology, 2005

Fast FPGA Placement using Space-filling Curve.
Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), 2005

A Fast Algorithm for Point Labeling Problem.
Proceedings of the 17th Canadian Conference on Computational Geometry, 2005

2004
LPRAM: a novel low-power high-performance RAM design with testability and scalability.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2004

LPRAM: a low power DRAM with testability.
Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, 2004


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