Sudhakar Surendran
Orcid: 0009-0005-9277-4314
According to our database1,
Sudhakar Surendran authored at least 11 papers
between 2008 and 2026.
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Bibliography
2026
Proceedings of the 39th International Conference on VLSI Design & 25th International Conference on Embedded Systems, 2026
SuperSAGA: A Supervisor-Subordinate Agentic workflow for the Generation of Assertions.
Proceedings of the 31st Asia and South Pacific Design Automation Conference, 2026
2025
Proceedings of the 38th International Conference on VLSI Design and 2024 23rd International Conference on Embedded Systems, 2025
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2025
2024
ACM Trans. Design Autom. Electr. Syst., 2024
2023
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023
2022
The CoveRT Approach for Coverage Management in Analog and Mixed-Signal Integrated Circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022
Proceedings of the 35th International Conference on VLSI Design and 2022 21st International Conference on Embedded Systems, 2022
2020
Proceedings of the 33rd International Conference on VLSI Design and 19th International Conference on Embedded Systems, 2020
Proceedings of the 25th Asia and South Pacific Design Automation Conference, 2020
2008
A systematic approach to synthesis of verification test-suites for modular SoC designs.
Proceedings of the 21st Annual IEEE International SoC Conference, SoCC 2008, 2008