Suyash Mahar

Orcid: 0000-0001-5287-5317

According to our database1, Suyash Mahar authored at least 12 papers between 2019 and 2026.

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Timeline

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Bibliography

2026
PhasedStore: Supporting High-Performance Write-Through Cache-Coherence Protocols Under TSO.
Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2026

2025
AutoSSD: CXL-Enhanced Autonomous SSDs for Low Tail Latency.
Proceedings of the 34th International Symposium on High-Performance Parallel and Distributed Computing, 2025

2024
The Hitchhiker's Guide to Programming and Optimizing CXL-Based Heterogeneous Systems.
CoRR, 2024

Telepathic Datacenters: Fast RPCs using Shared CXL Memory.
CoRR, 2024

Position: CXL Shared Memory Programming: Barely Distributed and Almost Persistent.
CoRR, 2024

Puddles: Application-Independent Recovery and Location-Independent Data for Persistent Memory.
Proceedings of the Nineteenth European Conference on Computer Systems, 2024

2023
Workload Behavior Driven Memory Subsystem Design for Hyperscale.
CoRR, 2023

Snapshot: Fast, Userspace Crash Consistency for CXL and PM Using msync.
Proceedings of the 41st IEEE International Conference on Computer Design, 2023

2021
PMFuzz: test case generation for persistent memory programs.
Proceedings of the ASPLOS '21: 26th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2021

Write Prediction for Persistent Memory Systems.
Proceedings of the 30th International Conference on Parallel Architectures and Compilation Techniques, 2021

2020
WoLFRaM: Enhancing Wear-Leveling and Fault Tolerance in Resistive Memories using Programmable Address Decoders.
Proceedings of the 38th IEEE International Conference on Computer Design, 2020

2019
Scalable, high-speed on-chip-based NDN name forwarding using FPGA.
Proceedings of the 20th International Conference on Distributed Computing and Networking, 2019


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