Swapnil Bahl

According to our database, Swapnil Bahl authored at least 8 papers between 2004 and 2014.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2014

Unifying scan compression.

Swapnil Bahl, Shreyans Rungta, Shray Khullar, Rohit Kapur, Anshuman Chandra, Salvatore Talluto, Pramod Notiyath, Ajay Rajagopalan

Proceedings of the 2014 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2014

2012

EDA solutions to new-defect detection in advanced process technologies.

Erik Jan Marinissen, Gilbert Vandling, Sandeep Kumar Goel, Friedrich Hapke, Jason Rivers, Nikolaus Mittermaier, Swapnil Bahl

Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

2011

State of the art low capture power methodology.

Swapnil Bahl, Roberto Mattiuzzo, Shray Khullar, Akhil Garg, S. Graniello, Khader S. Abdel-Hafez, Salvatore Talluto

Proceedings of the 2011 IEEE International Test Conference, 2011

Power Aware Shift and Capture ATPG Methodology for Low Power Designs.

Shray Khullar, Swapnil Bahl

Proceedings of the 20th IEEE Asian Test Symposium, 2011

2008

Low Power Test.

Swapnil Bahl, Rajiv Sarkar, Akhil Garg

Proceedings of the 2008 IEEE International Test Conference, 2008

Self-Programmable Shared BIST for Testing Multiple Memories.

Swapnil Bahl, Vishal Srivastava

Proceedings of the 13th European Test Symposium, 2008

2007

A Sharable Built-in Self-Repair for Semiconductor Memories with 2-D Redundancy Schema.

Swapnil Bahl

Proceedings of the 22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2007), 2007

2004

A Novel Method for Silicon Configurable Test Flow and Algorithms for Testing, Debugging and Characterizing Different Types of Embedded Memories through a Shared Controller.

Swapnil Bahl

Proceedings of the 12th IEEE International Workshop on Memory Technology, 2004